Intel Xeon Processor Multiprocessor Platform Design Guide

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Processor Power Distribution Guidelines
Processor Power Distribution
Guidelines 8
Note: Intel recommends systems utilize modules based on VRM 9.1 DC-DC Converter Design
Guidelines for Intel Xeon processor MP and Intel Xeon processor MP with up to 2-MB L3 cache
on the 0.13 micron process-based designs. These recommendations are required to meet the current
requirements of the processor.
8.1 Introduction
As computer performance demands increase, new, higher speed logic with increased density is
developed to fulfill these needs. To reduce their overall power dissipation, modern microprocessors
are being designed with lower voltage implementations. This in turn requires power supplies to
provide lower voltages with higher current capability. Because of this, processor power is now
becoming a significant portion of the system design and demands special attention. Now more than
ever, power distribution requires careful design practices. Intel Xeon processors MP and Intel Xeon
processors MP with up to 2-MB L3 cache on the 0.13 micron process have unique requirements for
voltages supplied to them. Their system bus implementation based on AGTL+ technology, the
processor core, and the cache are being powered from the same voltage supply. The demand on the
supply current and transient specification has increased drastically by the processor core. As the
differences in processor current between the low power state and the high power state increase, the
cost of the power distribution system becomes significant enough to merit careful calculation.
Centralized distribution of power, for example, is no longer the effective solution to power
distribution.
The intent of this chapter is to familiarize the reader with the power requirements of the Intel Xeon
processor MP and Intel Xeon processor MP with up to 2-MB L3 cache on the 0.13 micron process.
In addition, the chapter discusses simulation and power implementation techniques. It is assumed
the reader is familiar with power distribution issues of the Pentium III, Pentium II Xeon and
Pentium III Xeon processors.
8.2 Terms
“Flexible Mother Board” or “FMB” is an estimation of the worst-case value the processor family
will have over the lifetime of the product. The value is only an estimate and actual specifications
for future processors may differ. System designers should meet the FMB values to ensure their
systems will be compatible with all future processor family offerings.
“Power-Good” or “PWRGOOD” (an active high signal) indicates that all of the supplies and clocks
within the system are stable. PWRGOOD should go active a predetermined time after system
voltages are stable and should go inactive as soon as any of these voltages fail their specifications.