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Intel Xeon Processor LV and ULV Specification Update

ManualsBrandsIntel ManualsOther64-bit Intel Xeon Processor 3.16 GHz, 1M Cache, 667 MHz FSB
37383940414243444546
Specification Clarifications
Specification Update 45
Specification Clarifications
1. Enhanced Cache Error Reporting for D0 Stepping Specification
Clarification
Beginning with the D0 stepping, enhanced cache error reporting - as described in
Section 14.4 of the Intel
®
64 and IA-32 Architectures Software Developer’s Manual
(SDM), Volume 3A: System Programming Guide – is supported by the processor.
Older steppings use the original cache error reporting scheme. Please see the SDM,
Volume 3A, for more details.
Note: All specification clarifications will be incorporated into a future version of the
appropriate processor documentation.
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