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Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.2 Design Guidelines

ManualsBrandsIntel ManualsOther64-bit Intel Xeon Processor 3.00E GHz, 2M Cache, 800 MHz FSB
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Voltage Regulator Module (VRM) and Enterprise Voltage 7
Regulator-Down (EVRD) 10.2 Design Guidelines
1 Applications
1.1 Introduction and Terminology
This document defines DC-to-DC converters to meet the power requirements of computer systems
using 64-bit Intel
®
Xeon™ processor MP with up to 8MB L3 cache, 64-bit Intel
®
Xeon™
processor MP with 1MB L2 cache processors. Requirements will vary according to the needs of
different computer systems and processors that a specific voltage regulator is expected to support.
The intent of this document is to define electrical, thermal and mechanical specifications for
VRM10.2.
VRM – The voltage regulator module (VRM) designation in this document refers to a voltage
regulator that is plugged into a baseboard, where the baseboard is designed to support more than
one processor. VRM output requirements in this document are intended to match the needs of a set
of microprocessors.
EVRD – The Enterprise Voltage Regulator-Down (EVRD) designation in this document refers to a
voltage regulator that is embedded on a baseboard. The EVRD output requirements in this
document are intended to match the needs of a set of microprocessors. Each implementation of a
specific board must meet the specifications of all processors supported by the board.
‘1’ – In this document refers to a high voltage level (V
OH
and V
IH
).
‘0’ – In this document refers to a low voltage level (V
OL
and V
IL
)
‘#’ – Symbol after a signal name in this document refers to an active low signal, indicating that a
signal is in the asserted state when driven to a low level.
The specifications in the respective processor’s datasheet always take precedence over the data
provided in this document.
VRM/EVRD 10.2 incorporates functional changes from prior EVRD and VRM guidelines:
• Continuous load core current (Icc
TDC
) (thermal design current) has been increased to 130A
(Section 2.1).
• Maximum core current (Icc
MAX
) has been increased to 150A peak.
• Maximum current slew rate has been increased to 1200 A/µs.
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