Voltage Regulator Module (VRM) 10.2L Design Guidelines

4 Voltage Regulator Module (VRM) 10.2L Design Guidelines
8.6 Electrostatic Discharge - PROPOSED.............................................................................. 34
8.7 Shock and Vibration - PROPOSED .................................................................................. 34
8.8 Electromagnetic Compatibility - PROPOSED ................................................................... 34
8.9 Reliability - PROPOSED ................................................................................................... 34
8.10 Safety - PROPOSED ........................................................................................................ 34
9 Manufacturing Considerations ......................................................................................... 35
9.1 Lead Free (Pb Free)..........................................................................................................35
Figures
2-1 VRM 10.2L Load Current vs. Time...................................................................................... 9
2-2 VRM 10.2L Processor Die Load Line................................................................................ 10
2-3 Power-On Sequence Block Diagram ................................................................................ 12
2-4 Power-On Sequence Timing Diagram .............................................................................. 13
2-5 Processor Transition States.............................................................................................. 14
2-6 Dynamic VID Transition States Illustration........................................................................ 14
2-7 64-bit Intel
®
Xeon™ Processor MP with up to 8MB L3 Cache Load Model...................... 15
2-8 64-bit Intel
®
Xeon™ Processor MP with up to 1MB L2 Cache Load Model...................... 16
7-1 VRM 10.2 Module and Connector..................................................................................... 31
Tables
2-1 LL0, LL1 Codes................................................................................................................. 11
2-2 Recommended Decoupling and Other Specifications for Supported Processors............. 15
2-3 VRM 10.2L Decoupling Capacitor Recommendations...................................................... 16
3-1 OUTEN Specifications ...................................................................................................... 17
3-2 VID [5:0] Specifications.....................................................................................................17
3-3 Voltage Identification (VID) ............................................................................................... 18
3-4 LL0, LL1 Specifications..................................................................................................... 19
6-1 Vcc_PWRGD Specifications ............................................................................................. 25
6-2 VR_hot# Specifications ..................................................................................................... 25
6-3 VRM_pres# Specifications ................................................................................................ 26
7-1 VRM10.2 Connector Part Number and Vendor Name ...................................................... 27
7-2 VRM 10.2 Connector Pin Descriptions.............................................................................. 28
7-3 VRM 10.2 Pin Assignments .............................................................................................. 29