Intel Xeon Processor Multiprocessor Platform Design Guide

System Bus Routing

• For symmetric stripline, return path vias for both V

and V

must be provided.

• Do not switch reference from V

to V

or vice versa.

6.2 Serpentine Routing

A serpentine net is a transmission line that is routed in such a manner so that sections of the net

double back and couple to another segment of the same net.

A serpentining transmission line is sometimes necessary to properly match lengths between nets. It

is important to properly control the serpentine in order to avoid signal integrity and timing

problems. The primary impact of a serpentine trace is an observed decrease in the flight time when

compared to a straight trace of equal length. This decrease in the flight time is a result of the

crosstalk between parallel sections of the serpentine net. As the signal travels down the

transmission line, a component of the signal will follow the transmission line and behave as though

it were a straight line with no serpentine. However, another portion of the energy will propagate

perpendicular to the parallel routed portions of the serpentine net via the mutual capacitance and

mutual inductance. This creates an extra mode that will arrive at the receiver significantly earlier

than the other component of the signal. If the coupling between parallel sections is high, this will

cause significant timing skew when attempting to match trace lengths on a bus. Furthermore, if the

coupling is very high, significant signal integrity problems can result.

The serpentine guidelines included in this document were based on HSPICE simulations with

different spacing between parallel sections. The guidelines were chosen to significantly limit the

effect of serpentine nets.

Serpentine spacing S/H ratio should be greater than or equal to 5. The S/H ratio is shown in

Figure 6-1.

6.3 System Bus Decoupling Requirements

This section contains the motherboard decoupling recommendations to minimize return path

discontinuities and provide necessary power delivery for the bus I/O buffers. These are decoupling

requirements for the system bus I/O only. This decoupling is not adequate for power delivery. For

decoupling requirements for the processor core power, please refer to Section 8.9.

Figure 6-1. Serpentine Spacing - Diagram of Spacing to Reference Plane Height Ratio