Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

Intel

Xeon™ Processor and Intel

E7500/E7501 Chipset Compatible Platform Design Guide 201

Platform Power Delivery Guidelines

11.4.2 3.3 V/V5REF Sequencing

V5REF is the reference voltage for 5 V tolerance on inputs to the ICH3-S. V5REF must be

powered up before VCC3_3, or be no less than 0.7 V less than VCC3_3. Thus, VCC3_3 must

never be more than 0.7 V higher than V5REF. Also, V5REF must power down after VCC3_3, or

before VCC3_3 within 0.7 V. The rule must be followed in order to ensure the safety of the ICH3-

S. If the rule is violated, internal diodes will attempt to draw power sufficient to damage the diodes

from the VCC3_3 rail. Figure 11-27 shows a sample implementation of how to satisfy the V5REF/

3.3 V sequencing rule.

This rule also applies to the standby rails, but in most platforms, the VCCSus3_3 rail is derived

from the VCCSus5 rail and therefore, the VCCSus3_3 rail will always come up after the

VCCSus5 rail. As a result, V5REF_SUS will always be powered up before VCCSus3_3. In

platforms that do not derive the VCCSus3_3 rail from the VCCSus5 rail, this rule must be

enforced on the platform.

11.4.3 Intel

ICH3-S Power Rails

The ICH3-S refers to its standby rails as suspend. Table 11-7 lists the nomenclature.

Figure 11-27. Example 3.3 V/V5REF Sequencing Circuitry

To System

5 V Supply

To System

VCC Supply

(3.3 V)

1 kΩ

VREF

1 µF

Table 11-7. Intel

ICH3-S Power Rail Terminology

Platform Terminology Intel

ICH3-S Terminology

5 V Standby 5 V Suspend

3.3 V Standby 3.3 V Suspend

1.8 V Standby 1.8 V Suspend