Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.1 Design Guidelines

Voltage Regulator Module (VRM) and Enterprise Voltage 17
Regulator-Down (EVRD) 10.1 Design Guidelines
Output Voltage Requirements
NOTE:
1. Only the decoupling caps inside the socket cavity need to have the temperature coefficient of “X6S”.
In Figure 2-8, the capacitance labeled “mPGA604 Socket and Package Pins” is supplied by Intel
Corporation and is beyond the control of the system designer.
For VRM applications, it is recommended that the system designer work with the VRM supplier to
ensure proper implementation of the VRM converter.
2.10 Shut-Down Response - REQUIRED
Once the VRM/EVRD is operating after power-up, if either the Output Enable signal is deasserted
or VID [5:0] = X11111, the VRM/EVRD should turn off its output (the output should go to high
impedance) within 500 ms.
§
Table 2-3. VRM 10.1 Decoupling Capacitor Recommendations
Value Tolerance
Temperature
Coefficient
ESR
(mΩ)
ESL
(nH)
Note
560 µF Al-Polymer ±20% N/A 7 4
10 µF Ceramic ±20% X5R or X6S 10 1.2 1