Intel Xeon Processor Multiprocessor Platform Design Guide

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Processor Quadrant Layout
Processor Quadrant Layout 3
Figure 3-1 illustrates the quadrant layout of the Intel Xeon processor MP. Figure 3-2 illustrates the
quadrant layout of the Intel Xeon processor MP with up to 2-MB L3 cache on the 0.13 micron
process. In the event that this layout conflicts with the respective Intel Xeon Processor MP
Datasheets, the datasheets supersede.
The quadrant layout figures below do not show the exact component ball count, only the general
quadrant information. Only the exact ball assignment should be used to conduct routing analysis.
Refer to the processor datasheets for specific pin assignment information.
Figure 3-1. Top View - Intel
®
Xeon™ Processor MP Socket Quadrant Layout
Vcc/
Vss
ADDRESS
DATA
Vcc/
Vss
CLOCKS SMBus
COMMON
CLOCK
COMMON
CLOCK
Async/
JTAG
Intel Xeon Processor
MP
Top View
= Signal
= Power
= Ground
= Reserved
A
C
E
G
J
L
N
R
U
W
AA
AC
AE
B
D
F
H
K
M
P
T
V
Y
AB
AD
3 5 7 9 11 13 15 17 19 21 23 25 27 29 311
= GTLREF
= SM_VCC
A
C
E
G
J
L
N
R
U
W
AA
AC
AE
B
D
F
H
K
M
P
T
V
Y
AB
AD
2 4 6 8 10 12 14 16 18 20 22 24 26 28