Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-15
INSTRUCTION FORMATS AND ENCODINGS
LOOPZ/LOOPE – Loop Count while Zero/Equal 1110 0001 : 8-bit displacement
LOOPNZ/LOOPNE – Loop Count while not
Zero/Equal
1110 0000 : 8-bit displacement
LSL – Load Segment Limit
from register 0000 1111 : 0000 0011 : 11 reg1 reg2
from memory 0000 1111 : 0000 0011 : mod reg r/m
LSS – Load Pointer to SS 0000 1111 : 1011 0010 : mod
A
reg r/m
LTR – Load Task Register
from register 0000 1111 : 0000 0000 : 11 011 reg
from memory 0000 1111 : 0000 0000 : mod 011 r/m
MOV – Move Data
register1 to register2 1000 100w : 11 reg1 reg2
register2 to register1 1000 101w : 11 reg1 reg2
memory to reg 1000 101w : mod reg r/m
reg to memory 1000 100w : mod reg r/m
immediate to register 1100 011w : 11 000 reg : immediate data
immediate to register (alternate encoding) 1011 w reg : immediate data
immediate to memory 1100 011w : mod 000 r/m : immediate data
memory to AL, AX, or EAX 1010 000w : full displacement
AL, AX, or EAX to memory 1010 001w : full displacement
MOV – Move to/from Control Registers
CR0 from register 0000 1111 : 0010 0010 : 11 000 reg
CR2 from register 0000 1111 : 0010 0010 : 11 010reg
CR3 from register 0000 1111 : 0010 0010 : 11 011 reg
CR4 from register 0000 1111 : 0010 0010 : 11 100 reg
register from CR0-CR4 0000 1111 : 0010 0000 : 11 eee reg
MOV – Move to/from Debug Registers
DR0-DR3 from register 0000 1111 : 0010 0011 : 11 eee reg
DR4-DR5 from register 0000 1111 : 0010 0011 : 11 eee reg
DR6-DR7 from register 0000 1111 : 0010 0011 : 11 eee reg
Table B-13. General Purpose Instruction Formats and Encodings
for Non-64-Bit Modes (Contd.)
Instruction and Format Encoding