Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B A-11
OPCODE MAP
Table A-3. Two-byte Opcode Map: 00H — 77H (First Byte is 0FH) *
01234567
0
Grp 6
1A
Grp 7
1A
LAR
Gv, Ew
LSL
Gv, Ew
SYSCALL
o64
CLTS SYSRET
o64
1 movups
Vps, Wps
movss (F3)
Vss, Wss
movupd (66)
Vpd, Wpd
movsd (F2)
Vsd, Wsd
movups
Wps, Vps
movss (F3)
Wss, Vss
movupd (66)
Wpd, Vpd
movsd (F2)
Vsd, Wsd
movlps
Vq, Mq
movlpd (66)
Vq, Mq
movhlps
Vq, Uq
movddup(F2)
Vq, Wq
movsldup(F3)
Vq, Wq
movlps
Mq, Vq
movlpd (66)
Mq, Vq
unpcklps
Vps, Wq
unpcklpd (66)
Vpd, Wq
unpckhps
Vps, Wq
unpckhpd (66)
Vpd, Wq
movhps
Vq, Mq
movhpd (66)
Vq, Mq
movlhps
Vq, Uq
movshdup(F3)
Vq, Wq
movhps
Mq, Vq
movhpd(66)
Mq, Vq
2MOV
Rd, Cd
MOV
Rd, Dd
MOV
Cd, Rd
MOV
Dd, Rd
3 WRMSR RDTSC RDMSR RDPMC SYSENTER SYSEXIT
4 CMOVcc, (Gv, Ev) - Conditional Move
O NO B/C/NAE AE/NB/NC E/Z NE/NZ BE/NA A/NBE
5 movmskps
Gd, Ups
movmskpd
(66)
Gd, Upd
sqrtps
Vps, Wps
sqrtss (F3)
Vss, Wss
sqrtpd (66)
Vpd, Wpd
sqrtsd (F2)
Vsd, Wsd
rsqrtps
Vps, Wps
rsqrtss (F3)
Vss, Wss
rcpps
Vps, Wps
rcpss (F3)
Vss, Wss
andps
Vps, Wps
andpd (66)
Vpd, Wpd
andnps
Vps, Wps
andnpd (66)
Vpd, Wpd
orps
Vps, Wps
orpd (66)
Vpd, Wpd
xorps
Vps, Wps
xorpd (66)
Vpd, Wpd
6 punpcklbw
Pq, Qd
punpcklbw
(66)
Vdq, Wdq
punpcklwd
Pq, Qd
punpcklwd
(66)
Vdq, Wdq
punpckldq
Pq, Qd
punpckldq (66)
Vdq, Wdq
packsswb
Pq, Qq
packsswb (66)
Vdq, Wdq
pcmpgtb
Pq, Qq
pcmpgtb (66)
Vdq, Wdq
pcmpgtw
Pq, Qq
pcmpgtw (66)
Vdq, Wdq
pcmpgtd
Pq, Qq
pcmpgtd (66)
Vdq, Wdq
packuswb
Pq, Qq
packuswb (66)
Vdq, Wdq
7 pshufw
Pq, Qq, Ib
pshufd (66)
Vdq,Wdq,Ib
pshufhw(F3)
Vdq,Wdq,Ib
pshuflw (F2)
Vdq Wdq,Ib
(Grp 12
1A
) (Grp 13
1A
) (Grp 14
1A
) pcmpeqb
Pq, Qq
pcmpeqb (66)
Vdq, Wdq
pcmpeqw
Pq, Qq
pcmpeqw (66)
Vdq, Wdq
pcmpeqd
Pq, Qq
pcmpeqd (66)
Vdq, Wdq
emms