Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-203
INSTRUCTION SET REFERENCE, N-Z
The source operand can be an MMX technology register or a 64-bit memory location,
or it can be an XMM register or a 128-bit memory location. The destination operand
can be an MMX technology register or an XMM register. When the source data comes
from a 64-bit memory operand, the full 64-bit operand is accessed from memory, but
the instruction uses only the high-order 32 bits. When the source data comes from a
128-bit memory operand, an implementation may fetch only the appropriate 64 bits;
however, alignment to a 16-byte boundary and normal segment checking will still be
enforced.
The PUNPCKHBW instruction interleaves the high-order bytes of the source and
destination operands, the PUNPCKHWD instruction interleaves the high-order words
of the source and destination operands, the PUNPCKHDQ instruction interleaves the
high-order doubleword (or doublewords) of the source and destination operands,
and the PUNPCKHQDQ instruction interleaves the high-order quadwords of the
source and destination operands.
These instructions can be used to convert bytes to words, words to doublewords,
doublewords to quadwords, and quadwords to double quadwords, respectively, by
placing all 0s in the source operand. Here, if the source operand contains all 0s, the
result (stored in the destination operand) contains zero extensions of the high-order
data elements from the original value in the destination operand. For example, with
the PUNPCKHBW instruction the high-order bytes are zero extended (that is,
unpacked into unsigned word integers), and with the PUNPCKHWD instruction, the
high-order words are zero extended (unpacked into unsigned doubleword integers).
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PUNPCKHBW instruction with 64-bit operands:
DEST[7:0] DEST[39:32];
DEST[15:8] SRC[39:32];
DEST[23:16] DEST[47:40];
DEST[31:24] SRC[47:40];
DEST[39:32] DEST[55:48];
DEST[47:40] SRC[55:48];
DEST[55:48] DEST[63:56];
DEST[63:56] SRC[63:56];
PUNPCKHW instruction with 64-bit operands:
DEST[15:0] DEST[47:32];
DEST[31:16] SRC[47:32];
DEST[47:32] DEST[63:48];
DEST[63:48] SRC[63:48];