Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-170 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
PSLLW/PSLLD/PSLLQ—Shift Packed Data Left Logical
Description
Shifts the bits in the individual data elements (words, doublewords, or quadword) in
the destination operand (first operand) to the left by the number of bits specified in
the count operand (second operand). As the bits in the data elements are shifted left,
the empty low-order bits are cleared (set to 0). If the value specified by the count
operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quad-
word), then the destination operand is set to all 0s. Figure 4-8 gives an example of
shifting words in a 64-bit operand.
Opcode Instruction
64-
Bit
Mode
Compat/
Leg Mode Description
0F F1 /r PSLLW mm,
mm/m64
Valid Valid Shift words in mm left
mm/m64 while shifting in 0s.
66 0F F1 /r PSLLW xmm1,
xmm2/m128
Valid Valid Shift words in xmm1 left by
xmm2/m128 while shifting in
0s.
0F 71 /6 ib PSLLW xmm1, imm8 Valid Valid Shift words in mm left by imm8
while shifting in 0s.
66 0F 71 /6 ib PSLLW xmm1, imm8 Valid Valid Shift words in xmm1 left by
imm8 while shifting in 0s.
0F F2 /r PSLLD mm,
mm/m64
Valid Valid Shift doublewords in mm left
by mm/m64 while shifting in
0s.
66 0F F2 /r PSLLD xmm1,
xmm2/m128
Valid Valid Shift doublewords in xmm1 left
by xmm2/m128 while shifting
in 0s.
0F 72 /6 ib PSLLD mm, imm8 Valid Valid Shift doublewords in mm left
by imm8 while shifting in 0s.
66 0F 72 /6 ib PSLLD xmm1, imm8 Valid Valid Shift doublewords in xmm1 left
by
imm8 while shifting in 0s.
0F F3 /r PSLLQ mm,
mm/m64
Valid Valid Shift quadword in mm left by
mm/m64 while shifting in 0s.
66 0F F3 /r PSLLQ xmm1,
xmm2/m128
Valid Valid Shift quadwords in xmm1 left
by xmm2/m128 while shifting
in 0s.
0F 73 /6 ib PSLLQ mm, imm8 Valid Valid Shift quadword in mm left by
imm8 while shifting in 0s.
66 0F 73 /6 ib PSLLQ xmm1, imm8 Valid Valid Shift quadwords in xmm1 left
by imm8 while shifting in 0s.