Mobile Intel Pentium 4 Processor with 533 MHz Front Side Bus

Mobile Intel
®
Pentium
®
4 Processor with 533 MHz System Bus Datasheet 9
Introduction
1 Introduction
The mobile Intel

Pentium

4 processor with 533 MHz FSB is based on the Intel NetBurst
TM
micro-architecture. The mobile Intel Pentium 4 processor with 533-MHz FSB utilizes a 478-pin
Flip-Chip Pin Grid Array (FC-PGA2) package with an integrated heat spreader, and plugs into a
surface-mount, Zero Insertion Force (ZIF) socket. The mobile Intel Pentium 4 processor maintains
full compatibility with IA-32 software. In this document the mobile Intel Pentium 4 processor with
533 MHz FSB will be referred to as the “mobile Intel Pentium 4 processor with 533 MHz FSB”, or
“mobile Intel Pentium 4 processor”, or simply “the processor”.
The mobile Intel

Pentium

4 processor with 533 MHz FSB supports Hyper-Threading
Technology, which allows a single, physical processor to function as two logical processors. While
some execution resources such as caches, execution units, and buses are shared, each logical
processor has its own architecture state with its own set of general-purpose registers, control
registers to provide increased system responsiveness in multitasking environments, and headroom
for next generation multithreaded applications. Intel recommends enabling Hyper-Threading
Technology with Microsoft Windows* XP Professional or Windows* XP Home, and disabling
Hyper-Threading Technology via the BIOS for all previous versions of Windows operating
systems. For more information on Hyper-Threading Technology, see www.intel.com/info/
hyperthreading. Refer to Section 7.1 for Hyper-Threading Technology configuration details.
The Intel NetBurst micro-architecture features include hyper-pipelined technology, a rapid
execution engine, a 533-MHz FSB, and an execution trace cache. The hyper pipelined technology
doubles the pipeline depth in the mobile Intel Pentium 4 processor allowing the processor to reach
much higher core frequencies. The rapid execution engine allows the two integer ALUs in the
processor to run at twice the core frequency, which allows many integer instructions to execute in
1/2 clock tick. The 533-MHz FSB is a quad-pumped bus running off a 133-MHz system clock
making 4.3 GB/sec data transfer rates possible. The execution trace cache is a first level cache that
stores approximately 12-k decoded micro-operations, which removes the instruction decoding
logic from the main execution path, thereby increasing performance.
Additional features within the Intel NetBurst micro-architecture include advanced dynamic
execution, advanced transfer cache, enhanced floating point and multi-media unit, and Streaming
SIMD Extensions 2 (SSE2). The advanced dynamic execution improves speculative execution and
branch prediction internal to the processor. The advanced transfer cache is a 512-kB, on-die level 2
(L2) cache. A newly implemented floating point and multi media unit provides superior
performance for multi-media and mathematically intensive applications. Finally, SSE2 adds 144
new instructions for double-precision floating point, SIMD integer, and memory management.
Power management capabilities such as AutoHALT, Stop-Grant, Sleep, Deep Sleep, and Deeper
Sleep have been incorporated. The processor includes an address bus powerdown capability which
removes power from the address and data pins when the FSB is not in use. This feature is always
enabled on the processor.
The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in
multimedia applications including 3-D graphics, video decoding/encoding, and speech recognition.
The new packed, double-precision, floating-point instructions enhance performance for
applications that require greater range and precision, including scientific and engineering
applications and advanced 3-D geometry techniques, such as ray tracing.