Mobile Intel Pentium 4 Processor with 533 MHz System Bus Specification Update

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Specification Update 15
Z6.
The Processor Flags #PF Instead of #AC on an Unlocked CMPXCHG8B
Instruction
Problem: If a data page fault (#PF) and alignment check fault (#AC) both occur for an unlocked CMPXCHG8B
instruction, then #PF will be flagged.
Implication: Software that depends #AC before #PF will be affected since #PF is flagged in this case.
Workaround: Remove the software’s dependency on the fact that #AC has precedence over #PF. Alternately, reload
the page in the page fault handler and then restart the faulting instruction
Status: For the steppings affected, see the Summary Tables of Changes.
Z7.
When in No-Fill Mode the Memory Type of Large Pages Are Incorrectly Forced to
Uncacheable
Problem: When the processor is operating in No-Fill Mode (CR0.CD=1), the paging hardware incorrectly forces
the memory type of large (PSE-4M and PAE-2M) pages to uncacheable (UC) memory type regardless
of the MTRR settings. By forcing the memory type of these pages to UC, load operations, which should
hit valid data in the L1 cache, are forced to load the data from system memory. Some applications will
lose the performance advantage associated with the caching permitted by other memory types.
Implication: This erratum may result in some performance degradation when using no-fill mode with large pages.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
Z8.
Processor May Hang Due to Speculative Page Walks to Non-Existent System
Memory
Problem: A load operation that misses the Data Translation Lookaside Buffer (DTLB) will result in a page-walk.
If the page-walk loads the Page Directory Entry (PDE) from cacheable memory and that PDE load
returns data that points to a valid Page Table Entry (PTE) in uncacheable memory the processor will
access the address referenced by the PTE. If the address referenced does not exist the processor will
hang with no response from system memory.
Implication: Processor may hang due to speculative page walks to non-existent system memory.
Workaround: Page directories and page tables in UC memory space which are marked valid must point to physical
addresses that will return a data response to the processor.
Status: For the steppings affected, see the Summary Tables of Changes.