Mobile Intel Pentium 4 Processor with 533 MHz System Bus Specification Update

R
10 Specification Update
Stepping
NO.
D1
Plans ERRATA
Z43 X NoFix
BTS(Branch Trace Store) and PEBS(Precise Event Based Sampling) May Update
Memory outside the BTS/PEBS Buffer
Z44 X NoFix
Memory Ordering Failure May Occur with Snoop Filtering Third-Party Agents after
Issuing and Completing a BWIL (Bus Write Invalidate Line) or BLW (Bus Locked
Write) Transaction
Z45 X NoFix
Control Register 2 (CR2) Can be Updated during a REP MOVS/STOS Instruction
with Fast Strings Enabled
Z46 X NoFix
Writing the Local Vector Table (LVT) when an Interrupt Is Pending May Cause an
Unexpected Interrupt
Z47 X No Fix A Write to an APIC Register Sometimes May Appear to Have Not Occurred
Number SPECIFICATION CHANGE
Z1 Minimum and Maximum A1 Dimension for Alternate Equivalent Package Have Been Updated
Number SPECIFICATION CLARIFICATIONS
Z1 Specification Clarification with Respect to Time-stamp Counter - Removed
Number DOCUMENTATION CHANGES
There are no Documentation Changes in this Specification Update revision.
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