Mobile Intel Pentium 4 Processor Supporting Hyper-Threading Technology on 90-nm Process Technology
22 Mobile IntelĀ® PentiumĀ® 4 Processor Supporting Hyper-Threading Technology on 90-nm Process Technology Datasheet
Electrical Specifications
NOTES:
1. The loadline specifications include both static and transient limits.
2. This table is intended to aid in reading discrete points on Figure 2-2.
3. The loadlines specify voltage limits at the die measured at the V
CC_SENSE
and V
SS_SENSE
pins. Voltage
regulation feedback for voltage regulator circuits must be taken from processor V
CC
and V
SS
pins.
4. The voltage used in Deep Sleep mode must first be offset by 1.7% from the VID setting before reading the
voltage deviation on respective loadline.
NOTES:
1. The loadline specification includes both static and transient limits except for overshoot allowed as shown in
Section 2.11.
2. This loadline specification shows the deviation from the VID set point.
Table 2-9. V
CC
Core Deep Sleep State Voltage Regulator Static and Transient Tolerance
(Deep Sleep VID Offset = 1.7%)
Icc (A)
Voltage Deviation from (VID Setting - 1.7% of VID Setting) (V)
1,2,3,4
Maximum Typical Minimum
0 0.000 -0.025 -0.050
5 -0.007 -0.033 -0.059
10 -0.015 -0.041 -0.068
15 -0.022 -0.049 -0.077
20 -0.029 -0.058 -0.086
25 -0.036 -0.066 -0.095
30 -0.044 -0.074 -0.104
35 -0.051 -0.082 -0.113
40 -0.058 -0.090 -0.122
Figure 2-2. Vcc Static and Transient Tolerance
1, 2, 3
VID - 0.000
VID - 0.025
VID - 0.050
VID - 0.075
VID - 0.100
VID - 0.125
VID - 0.150
VID - 0.175
VID - 0.200
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75
Icc [A]
Vcc [V]
Vcc
Typical
Vcc
Maximu
m
Vcc
Minimu
m