Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-85
INSTRUCTION FORMATS AND ENCODINGS
Table B-27. Format and Encoding of SSE2 Cacheability Instructions
Instruction and Format Encoding
MASKMOVDQU—Store Selected Bytes
of Double Quadword
xmmreg to xmmreg 0110 0110:0000 1111:1111 0111:11 xmmreg1
xmmreg2
CLFLUSH—Flush Cache Line
mem 0000 1111:1010 1110:mod r/m
MOVNTPD—Store Packed Double-
Precision Floating-Point Values Using
Non-Temporal Hint
xmmreg to mem 0110 0110:0000 1111:0010 1011: mod xmmreg r/m
MOVNTDQ—Store Double Quadword
Using Non-Temporal Hint
xmmreg to mem 0110 0110:0000 1111:1110 0111: mod xmmreg r/m
MOVNTI—Store Doubleword Using
Non-Temporal Hint
reg to mem 0000 1111:1100 0011: mod reg r/m
PAUSE—Spin Loop Hint 1111 0011:1001 0000
LFENCE—Load Fence 0000 1111:1010 1110: 11 101 000
MFENCE—Memory Fence 0000 1111:1010 1110: 11 110 000