Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-68 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
Table B-23. Format and Encoding of SSE Cacheability & Memory Ordering
Instructions
Instruction and Format Encoding
MASKMOVQ—Store Selected Bytes of Quadword
mmreg to mmreg 0000 1111:1111 0111:11 mmreg1
mmreg2
MOVNTPS—Store Packed Single-Precision Floating-
Point Values Using Non-Temporal Hint
xmmreg to mem 0000 1111:0010 1011: mod xmmreg
r/m
MOVNTQ—Store Quadword Using Non-Temporal
Hint
mmreg to mem 0000 1111:1110 0111: mod mmreg r/m
PREFETCHT0—Prefetch Temporal to All Cache
Levels
0000 1111:0001 1000:mod
A
001 mem
PREFETCHT1—Prefetch Temporal to First Level
Cache
0000 1111:0001 1000:mod
A
010 mem
PREFETCHT2—Prefetch Temporal to Second Level
Cache
0000 1111:0001 1000:mod
A
011 mem
PREFETCHNTA—Prefetch Non-Temporal to All Cache
Levels
0000 1111:0001 1000:mod
A
000 mem
SFENCE—Store Fence 0000 1111:1010 1110:11 111 000