Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-276 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
D3 /7 SAR r/m16, CL Valid Valid Signed divide* r/m16 by 2,
CL times.
C1 /7 ib SAR r/m16, imm8 Valid Valid Signed divide*
r/m16 by 2,
imm8 times.
D1 /7 SAR r/m32, 1 Valid Valid Signed divide* r/m32 by 2,
once.
REX.W + D1 /7 SAR r/m64, 1 Valid N.E. Signed divide* r/m64 by 2,
once.
D3 /7 SAR r/m32, CL Valid Valid Signed divide*
r/m32 by 2,
CL times.
REX.W + D3 /7 SAR r/m64, CL Valid N.E. Signed divide*
r/m64 by 2,
CL times.
C1 /7 ib SAR r/m32, imm8 Valid Valid Signed divide*
r/m32 by 2,
imm8 times.
REX.W + C1 /7 ib SAR r/m64, imm8 Valid N.E. Signed divide*
r/m64 by 2,
imm8 times
D0 /4 SHL r/m8, 1 Valid Valid Multiply r/m8 by 2, once.
REX + D0 /4 SHL r/m8**, 1 Valid N.E. Multiply r/m8 by 2, once.
D2 /4 SHL r/m8, CL Valid Valid Multiply r/m8 by 2, CL times.
REX + D2 /4 SHL r/m8**, CL Valid N.E. Multiply r/m8 by 2, CL times.
C0 /4 ib SHL r/m8, imm8 Valid Valid Multiply r/m8 by 2, imm8
times.
REX + C0 /4 ib SHL r/m8**, imm8 Valid N.E. Multiply r/m8 by 2, imm8
times.
D1 /4 SHL r/m16,1 Valid Valid Multiply r/m16 by 2, once.
D3 /4 SHL r/m16, CL Valid Valid Multiply r/m16 by 2, CL
times.
C1 /4 ib SHL r/m16, imm8 Valid Valid Multiply r/m16 by 2, imm8
times.
D1 /4 SHL r/m32,1 Valid Valid Multiply r/m32 by 2, once.
REX.W + D1 /4 SHL r/m64,1 Valid N.E. Multiply r/m64 by 2, once.
D3 /4 SHL r/m32, CL Valid Valid Multiply r/m32 by 2, CL
times.
REX.W + D3 /4 SHL r/m64, CL Valid N.E. Multiply r/m64 by 2, CL
times.
C1 /4 ib SHL r/m32, imm8 Valid Valid Multiply r/m32 by 2, imm8
times.
REX.W + C1 /4 ib SHL r/m64, imm8
Valid N.E. Multiply r/m64 by 2, imm8
times.