Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B A-7
OPCODE MAP
— Wdq: The R/M field of the ModR/M byte selects either a 128-bit XMM register
or memory location.
— Ib: Immediate data is encoded in the subsequent byte of the instruction.
• The next byte is the ModR/M byte (C1H). The reg field indicates that the first
operand is XMM0. The mod shows that the R/M field specifies a register and the
R/M indicates that the second operand is XMM1.
• The last byte is the immediate byte (08H).
• By this breakdown, it has been shown that this opcode represents the
instruction: PALIGNR XMM0, XMM1, 8.
A.2.5 Superscripts Utilized in Opcode Tables
Table A-1 contains notes on particular encodings. These notes are indicated in the
following opcode maps by superscripts. Gray cells indicate instruction groupings.
Table A-1. Superscripts Utilized in Opcode Tables
Superscript
Symbol Meaning of Symbol
1A Bits 5, 4, and 3 of ModR/M byte used as an opcode extension (refer to Section
A.4, “Opcode Extensions For One-Byte And Two-byte Opcodes”).
1B Use the 0F0B opcode (UD2 instruction) or the 0FB9H opcode when deliberately
trying to generate an invalid opcode exception (#UD).
1C Some instructions added in the Pentium III processor may use the same two-
byte opcode. If the instruction has variations, or the opcode represents
different instructions, the ModR/M byte will be used to differentiate the
instruction. For the value of the ModR/M byte needed to decode the instruction,
see Table A-6.
These instructions include SFENCE, STMXCSR, LDMXCSR, FXRSTOR, and
FXSAVE, as well as PREFETCH and its variations.
i64 The instruction is invalid or not encodable in 64-bit mode. 40 through 4F (single-
byte INC and DEC) are REX prefix combinations when in 64-bit mode (use FE/FF
Grp 4 and 5 for INC and DEC).
o64 Instruction is only available when in 64-bit mode.
d64 When in 64-bit mode, instruction defaults to 64-bit operand size and cannot
encode 32-bit operand size.
f64 The operand size is forced to a 64-bit operand size when in 64-bit mode
(prefixes that change operand size are ignored for this instruction in 64-bit
mode).