Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-17
INSTRUCTION SET REFERENCE, N-Z
OUTS/OUTSB/OUTSW/OUTSD—Output String to Port
Description
Copies data from the source operand (second operand) to the I/O port specified with
the destination operand (first operand). The source operand is a memory location,
the address of which is read from either the DS:SI, DS:ESI or the RSI registers
(depending on the address-size attribute of the instruction, 16, 32 or 64, respec-
tively). (The DS segment may be overridden with a segment override prefix.) The
destination operand is an I/O port address (from 0 to 65,535) that is read from the
DX register. The size of the I/O port being accessed (that is, the size of the source
and destination operands) is determined by the opcode for an 8-bit I/O port or by the
operand-size attribute of the instruction for a 16- or 32-bit I/O port.
Opcode* Instruction
64-Bit
Mode
Compat/
Leg Mode Description
6E OUTS DX, m8 Valid Valid Output byte from memory
location specified in DS:(E)SI or
RSI to I/O port specified in
DX**.
6F OUTS DX, m16 Valid Valid Output word from memory
location specified in DS:(E)SI or
RSI to I/O port specified in
DX**.
6F OUTS DX, m32 Valid Valid Output doubleword from
memory location specified in
DS:(E)SI or RSI to I/O port
specified in DX**.
6E OUTSB Valid Valid Output byte from memory
location specified in DS:(E)SI or
RSI to I/O port specified in
DX**.
6F OUTSW Valid Valid Output word from memory
location specified in DS:(E)SI or
RSI to I/O port specified in
DX**.
6F OUTSD Valid Valid Output doubleword from
memory location specified in
DS:(E)SI or RSI to I/O port
specified in DX**.
NOTES:
* See IA-32 Architecture Compatibility section below.
** In 64-bit mode, only 64-bit (RSI) and 32-bit (ESI) address sizes are supported. In non-64-bit
mode, only 32-bit (ESI) and 16-bit (SI) address sizes are supported.