Mobile Intel Pentium 4 Processor with 533 MHz System Bus Specification Update

R
Specification Update 19
Z13.
Cascading of Performance Counters Does Not Work Correctly When Forced
Overflow Is Enabled
Problem: The performance counters are organized into pairs. When the CASCADE bit of the Counter
Configuration Control Register (CCCR) is set, a counter that overflows will continue to count in the
other counter of the pair. The FORCE_OVF bit forces the counters to overflow on every non-zero
increment. When the FORCE_OVF bit is set, the counter overflow bit will be set but the counter no
longer cascades.
Implication: The performance counters do not cascade when the FORCE_OVF bit is set.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
Z14.
EMON Event Counting of x87 Loads May Not Work As Expected
Problem: If a performance counter is set to count x87 loads and floating point exceptions are unmasked, the FPU
Operand Data Pointer (FDP) may become corrupted.
Implication: When this erratum occurs, the FPU Operand Data Pointer (FDP) may become corrupted.
Workaround: This erratum will not occur with floating point exceptions masked. If floating point exceptions are
unmasked, then performance counting of x87 loads should be disabled.
Status: For the steppings affected, see the Summary Tables of Changes.
Z15.
Buffer on Resistance May Exceed Specification
Problem: The datasheet specifies the resistance range for R
ON
(Buffer On Resistance) for the AGTL+ and
Asynchronous GTL+ buffers as 5 to 11 Ohms. Due to this erratum, R
ON
may be as high as 13.11 Ohms.
Implication: The R
ON
value affects the voltage level of the signals when the buffer is driving the signal low. A higher
R
ON
may adversely affect the system's ability to meet specifications such as V
IL
. As the system design
also affects margin to specification, designs may or may not have sufficient margin to function properly
with an increased R
ON
. System designers should evaluate whether a particular system is affected by this
erratum. Designs that follow the recommendations in the Intel® Pentium® 4 Processor and Intel® 850
Chipset Platform Design Guide are not expected to be affected.
Workaround: No workaround is necessary for systems with margin sufficient to accept a higher R
ON
.
Status: For the steppings affected, see the Summary Table of Change.