Mobile Intel Pentium 4 Processor Supporting Hyper-Threading Technology on 90-nm Process Technology

Mobile Intel® Pentium® 4 Processor Supporting Hyper-Threading Technology on 90-nm Process Technology Datasheet 5
Figures
2-1 Phase Lock Loop (PLL) Filter Requirements ......................................................14
2-2 Vcc Static and Transient Tolerance1, 2, 3 .......................................................... 22
2-3 VCC Overshoot Example Waveform................................................................... 26
3-1 Processor Package Assembly Sketch.................................................................27
3-2 Processor Package Drawing Sheet 1 of 2...........................................................29
3-3 Processor Package Drawing Sheet 2 of 2...........................................................30
3-4 Processor Top-Side Markings .............................................................................32
3-5 Processor Pin-Out Coordinates, Top View..........................................................33
4-1 Pinout Diagram (Top View—Left Side) ............................................................... 48
4-2 Pinout Diagram (Top View—Right Side) ............................................................. 49
5-1 Case Temperature (TC) Measurement Location.................................................60
5-2 Intel Thermal Monitor 2 Frequency and Voltage Ordering ..................................62
6-1 Stop Clock State Machine ...................................................................................68
Tables
1-1 References ............................................................................................................9
2-1 Core Frequency to Front Side Bus Multiplier Configuration ................................ 12
2-2 Voltage Identification Definition ...........................................................................13
2-3 Front Side Bus Pin Groups.................................................................................. 16
2-4 Signal Description Table .....................................................................................17
2-5 Signal Reference Voltages..................................................................................17
2-6 BSEL[1:0] Frequency Table for BCLK[1:0]..........................................................18
2-7 Absolute Maximum and Minimum Ratings .......................................................... 19
2-8 Voltage and Current Specifications .....................................................................20
2-9 VCC Core Deep Sleep State Voltage Regulator Static and Transient Tolerance
(Deep Sleep VID Offset = 1.7%) .........................................................................22
2-10 GTL+ Signal Group DC Specifications................................................................23
2-11 Asynchronous GTL+ Signal Group DC Specifications ........................................ 23
2-12 PWRGOOD and TAP Signal Group DC Specifications.......................................24
2-13 VCCVID DC Specifications .................................................................................24
2-14 VIDPWRGD DC Specifications ........................................................................... 24
2-15 BSEL [1:0] and VID[5:0] DC Specifications.........................................................25
2-16 BOOTSELECT DC Specifications.......................................................................25
2-17 VCC Overshoot Specifications ............................................................................ 25
3-1 Processor Loading Specifications .......................................................................31
3-2 Package Handling Guidelines .............................................................................31
3-3 Processor Materials.............................................................................................32
4-1 Alphabetical Pin Assignments .............................................................................35
4-2 Numerical Pin Assignment ..................................................................................42
4-3 Signal Description ...............................................................................................50
5-1 Processor Thermal Specifications.......................................................................60
5-2 Thermal Diode Parameters ................................................................................. 64
5-3 Thermal Diode Interface......................................................................................65
6-1 Power-On Configuration Option Pins ..................................................................67