Mobile Intel Pentium 4 Processor Supporting Hyper-Threading Technology* on 90 nm Process Technology Specification Update

R
8 Specification Update
K = Mobile Intel
®
Pentium
®
III Processor – M
L = Intel
®
Celeron
®
D processor
M =Mobile Intel
®
Celeron
®
processor
N = Intel
®
Pentium
®
4 processor
O = Intel
®
Xeon
®
processor MP
P = Intel
®
Xeon
®
processor
Q = Mobile Intel
®
Pentium
®
4 processor supporting Hyper-Threading Technology on 90-nm technology
process
R = Intel
®
Pentium
®
4 processor on 90 nm process
S = 64-bit Intel
®
Xeon
®
processor with 800 MHz system bus (1-MB and 2-MB L2 cache versions)
T = Mobile Intel
®
Pentium
®
4 processor – M
U = 64-bit Intel
®
Xeon
®
processor MP with up to 8-MB L3 cache
V = Mobile Intel
®
Celeron
®
processor on .13 Micron process in micro-FCPGA package
W = Intel
®
Celeron
®
M processor`
X = Intel
®
Pentium
®
M processor on 90 nm process with 2-MB L2 cache
Y = Intel
®
Pentium
®
M processor
Z = Mobile Intel
®
Pentium
®
4 processor with 533 MHz system bus
The Specification Updates for the Pentium processor, Pentium Pro processor, and other Intel products do
not use this convention.
NO. D0 E0 Plans ERRATA
Q1 X X NoFix Transaction is not retried after BINIT#
Q2 X X NoFix Invalid opcode 0FFFH requires a ModRM byte
Q3 X X NoFix
Processor may hang due to Speculative Page Walks to Non-Existent System
Memory
Q4 X X NoFix Memory type of the load lock different from its corresponding store unlock
Q5 X X NoFix
Machine check architecture error reporting and recovery may not work as
expected
Q6 X X NoFix Debug mechanisms may not function as expected
Q7 X X NoFix
Cascading of performance counters does not work correctly when forced
overflow is enabled
Q8 X X NoFix EMON event counting of X87 loads may not work as expected
Q9 X X NoFix
System bus interrupt messages without data and which receive a HardFailure
response may hang the processor
Q10 X X NoFix
The Processor Signals Page-Fault Exception (#PF) Instead of Alignment
Check Exception (#AC) on an Unlocked CMPXCHG8B Instruction
Q11 X X NoFix
FSW may not be completely restored after page fault on FRSTOR or FLDENV
instructions
Q12 X X NoFix
Processor Issues Inconsistent Transaction Size Attributes for Locked
Operation
Q13 X X NoFix
When the processor is in the System Management Mode (SMM), Debug
Registers may be fully writeable