Datasheet

Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 3
Contents
1Introduction............................................................................................................11
1.1 Terminology .....................................................................................................11
1.1.1 Processor Terminology............................................................................12
1.2 References .......................................................................................................13
2 Electrical Specifications...........................................................................................15
2.1 Power and Ground Lands....................................................................................15
2.2 Decoupling Guidelines........................................................................................15
2.2.1 VCC Decoupling .....................................................................................15
2.2.2 Vtt Decoupling.......................................................................................15
2.2.3 FSB Decoupling......................................................................................16
2.3 Voltage Identification.........................................................................................16
2.4 Market Segment Identification (MSID) .................................................................18
2.5 Reserved, Unused, and TESTHI Signals ................................................................18
2.6 ......................................................................................................................19
2.7 Voltage and Current Specification........................................................................19
2.7.1 Absolute Maximum and Minimum Ratings ..................................................19
2.7.2 DC Voltage and Current Specification........................................................20
2.7.3 V
CC
Overshoot .......................................................................................24
2.7.4 Die Voltage Validation.............................................................................24
2.8 Signaling Specifications......................................................................................25
2.8.1 FSB Signal Groups..................................................................................25
2.8.2 CMOS and Open Drain Signals .................................................................27
2.8.3 Processor DC Specifications .....................................................................27
2.8.3.1 GTL+ Front Side Bus Specifications .............................................29
2.8.4 Clock Specifications................................................................................29
2.8.5 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking............................29
2.8.6 FSB Frequency Select Signals (BSEL[2:0]).................................................30
2.8.7 Phase Lock Loop (PLL) and Filter ..............................................................30
2.8.8 BCLK[1:0] Specifications (CK505 based Platforms) ..................................... 30
2.8.9 BCLK[1:0] Specifications (CK410 based Platforms) ..................................... 32
2.9 PECI DC Specifications.......................................................................................33
3 Package Mechanical Specifications ..........................................................................35
3.1 Package Mechanical Drawing...............................................................................36
3.1.1 Processor Component Keep-Out Zones......................................................40
3.1.2 Package Loading Specifications ................................................................40
3.1.3 Package Handling Guidelines....................................................................40
3.1.4 Package Insertion Specifications...............................................................40
3.1.5 Processor Mass Specification....................................................................41
3.1.6 Processor Materials.................................................................................41
3.2 Processor Markings............................................................................................41
3.2.1 Processor Land Coordinates.....................................................................43
4 Land Listing and Signal Descriptions .......................................................................45
4.1 Processor Land Assignments...............................................................................45
4.2 Alphabetical Signals Reference............................................................................68
5 Thermal Specifications and Design Considerations ..................................................75
5.1 Processor Thermal Specifications.........................................................................75
5.1.1 Thermal Specifications............................................................................75
5.1.2 Thermal Metrology .................................................................................80
5.2 Processor Thermal Features................................................................................80