Uncore Manual

Uncore Performance Monitoring
Cacheing Agent (Cbo) Performance Monitoring
32 Reference Number: 329468-002
2.3.3.1 CBo Box Level PMON State
The following registers represent the state governing all box-level PMUs in the CBo.
In the case of the CBo, the Cn_MSR_PMON_BOX_CTL register provides the ability to manually freeze
the counters in the box (.frz) and reset the generic state (.rst_ctrs and .rst_ctrl).
C13_MSR_PMON_CTL3 0x0EB3 32 CBo 13 PMON Control for Counter 3
C13_MSR_PMON_CTL2 0x0EB2 32 CBo 13 PMON Control for Counter 2
C13_MSR_PMON_CTL1 0x0EB1 32 CBo 13 PMON Control for Counter 1
C13_MSR_PMON_CTL0 0x0EB0 32 CBo 13 PMON Control for Counter 0
Box-Level Control/Status
C13_MSR_PMON_BOX_CTL 0x0EA4 32 CBo 13 PMON Box-Wide Control
CBo 14 PMON Registers
Generic Counters
C14_MSR_PMON_CTR3 0x0ED9 64 CBo 14 PMON Counter 3
C14_MSR_PMON_CTR2 0x0ED8 64 CBo 14 PMON Counter 2
C14_MSR_PMON_CTR1 0x0ED7 64 CBo 14 PMON Counter 1
C14_MSR_PMON_CTR0 0x0ED6 64 CBo 14 PMON Counter 0
Box-Level Filter
C14_MSR_PMON_BOX_FILTER 0x0ED4 32 CBo 14 PMON Filter
C14_MSR_PMON_BOX_FILTER1 0x0EDA 32 CBo 14 PMON Filter1
Generic Counter Control
C14_MSR_PMON_CTL3 0x0ED3 32 CBo 14 PMON Control for Counter 3
C14_MSR_PMON_CTL2 0x0ED2 32 CBo 14 PMON Control for Counter 2
C14_MSR_PMON_CTL1 0x0ED1 32 CBo 14 PMON Control for Counter 1
C14_MSR_PMON_CTL0 0x0ED0 32 CBo 14 PMON Control for Counter 0
Box-Level Control/Status
C14_MSR_PMON_BOX_CTL 0x0EC4 32 CBo 14 PMON Box-Wide Control
MSR Name
MSR
Address
Size
(bits)
Description