Datasheet
Register Description
R
Datasheet 85
3.7.18 FDHC – Fixed DRAM Hole Control Register (Device #0)
Address Offset: 58h
Default Value: 00h
Access: Read/Write
Size: 8 bits
This 8-bit register controls a single fixed DDR SDRAM hole: 15–16 MB.
Bit Description
7 Hole Enable (HEN): This field enables a memory hole in DDR SDRAM space. Host
cycles matching an enabled hole are passed onto ICH4-M through hub interface. The
GMCH/MCH will ignore hub interface cycles matching an enabled hole.
NOTE: A selected hole is not re-mapped.
0 = None
1 = 15 MB–16 MB (1MBs)
6:0 Reserved
3.7.19 PAM(6:0) – Programmable Attribute Map Register (Device
#0)
Address Offset: 59–5Fh
Default Value: 00h Each
Attribute: Read/Write
Size: 4 bits/register, 14 registers
The GMCH allows programmable DDR SDRAM attributes on 13 legacy system memory
segments of various sizes in the 640 kB –1 MB address range. Seven Programmable Attribute
Map (PAM) registers are used to support these features. Cacheability of these areas is controlled
via the MTRR registers in the P6 processor. Two bits are used to specify system memory
attributes for each system memory segment. These bits apply to both Host and hub interface
initiator accesses to the PAM areas. These attributes are:
RE - Read Enable. When RE = 1, the CPU Read accesses to the corresponding system
memory segment are claimed by the GMCH/MCH and directed to main system memory.
Conversely, when RE = 0, the Host Read accesses are directed to PCI0.
WE - Write Enable. When WE = 1, the Host Write accesses to the corresponding system
memory segment are claimed by the GMCH/MCH and directed to main system memory.
Conversely, when WE = 0, the Host Write accesses are directed to PCI0.
The RE and WE attributes permit a system memory segment to be Read Only, Write Only,
Read/Write, or Disabled. For example, if a system memory segment has RE = 1 and WE = 0, the
segment is Read Only.
Each PAM register controls two regions, typically 16 kB in size. Each of these regions has a 4-bit
field. The 4 bits that control each region have the same encoding and are defined in the following
table.