Datasheet

82 Datasheet

3.7.15 GMC – GMCH Miscellaneous Control Register (Device #0)

Address Offset: 50–51h

Default Value: 0000h

Access: Read/Write

Size: 16 bits

Bit Description

15:10 Reserved

9 Aperture Access Global Enable—R/W. This bit is used to prevent access to the

aperture from any port (CPU, PCI0 or AGP/PCI1) before the aperture range is

established and appropriate translation table in the main DDR SDRAM has been

initialized. Default is 0. It must be set after system is fully configured for aperture

accesses.

NOTE: If the AGP_DVO strap is set to DVO then this bit is is RO.

8 RRBAR Access Enable—R/W:

1 = Enables the RRBAR space.

0 = Disable

7:1 Reserved

0 MDA Present (MDAP)—R/W:

This bit should not be set when the VGA Enable bit is not set. If the VGA enable bit is

set, then accesses to IO address range x3BCh–x3BFh are forwarded to hub interface. If

the VGA enable bit is not set then accesses to IO address range x3BCh–x3BFh are

treated just like any other IO accesses. MDA resources are defined as the following:

Memory: 0B0000h – 0B7FFFh

I/O: 3B4h, 3B5h, 3B8h, 3B9h, 3BAh, 3BFh,

(including ISA address aliases, A[15:10] are not used in decode)

Any I/O reference that includes the I/O locations listed above, or their aliases, will be

forwarded to hub interface even if the reference includes I/O locations not listed above.

The following table shows the behavior for all combinations of MDA and VGA:

VGA MDA Behavior

0 0 All References to MDA and VGA go to hub interface (Default)

0 1 Reserved

1 0 All References to VGA go to PCI.

MDA-only references (I/O address 3BF and aliases)

will go to hub interface.

1 1 VGA References go to PCI; MDA References

go to hub interface