Datasheet

Register Description
R
Datasheet 81
3.7.14 RRBAR – Register Range Base Address Register (Device
#0)
Address Offset: 48−4Bh
Default Value: 00000000h
Access: Read/Write, Read Only
Size: 32 bits
This register requests a 64-kB allocation for the Device registers. The base address is defined by
bits 31 to 16 and can be used to access device configuration registers. Only Dword aligned writes
are allowed to this space. See Table below for address map within the 64-kB space. This
addressing mechanism may be used to write to registers that modify the device address map.
However, before using or allowing the use of the modified address map the bios must synchronize
using an IO or Read cycle. Bit 8 of the GCC register is used to prevent accesses to this range
before the configuration software initializes this register.
Bit Description
31:16 Memory Base Address—R/W. Set by the OS, these bits correspond to address signals
[31:16].
15:0 Reserved
Address Range
Sub Ranges
Description
0000h to 00FFh Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #0, Function #0 register space.
0100h to 01FFh Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #0, Function #1 register space.
0200h to 02FFh
Reserved
0300h to 03FFh
Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #0, Function #3 register space.
0400h to 07FFh
Reserved
0800h to 08FFh
Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #1, Function #0 register space.
0900h to 0FFFh
Reserved
1000h to 10FFh
Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #2, Function #0 register space.
1100h to 11FFh
Read/Write (As in Configuration Space): Maps to 00–FFh of
Device #2, Function #1 register space.
1200h to 7FFFh
Reserved
8000h to 8FFFh
System memory Rcomp memory Range.
0000h to FFFFh
Space
9000h to FFFFh
Reserved