Datasheet

80 Datasheet

3.7.13 CAPID⎯Capability Identification Register (Device #0)

Address Offset: 40 – 44h

Default: Chipset Dependent

Access: Read Only

Size 40 bits

The Capability Identification Register uniquely identifies chipset capabilities as defined in the

table below. The bits in this register are intended to define a capability ceiling for each feature,

not a capability select. The BIOS must read this register to identify the part and comprehend the

capabilities specified within when configuring the effected portions of the GMCH/MCH.

The default setting, in most cases, allows the maximum capability. This register is Read Only.

Writes to this register have no effect.

Bit Description

39:37 Capability ID [2:0]:

000-001= Reserved

010 = Intel 852GME GMCH

011 = Intel 852PM MCH

100 = Reserved

101 = Intel 852GM GMCH

110 – 111 = Reserved

36:31 Reserved

30 Limit System Memory ECC Capability

0 = ECC capability supported.

1 = ECC capability not supported.

29:28 Reserved

27:24 CAPREG Version: This field has the value 0001b to identify the first revision of the

CAPREG definition.

23:16 Cap_length: This field has the value 05h indicating the structure length.

15:0 Reserved