Datasheet

Register Description
R
Datasheet 77
3.7.7 BCC – Base Class Code Register (Device #0)
Address Offset: 0Bh
Default Value: 06h
Access: Read Only
Size: 8 bits
This register contains the Base Class code of the GMCH/MCH Device #0. This code is 06h
indicating a bridge device.
Bit Description
7:0 Base Class Code (BASEC): This is an 8-bit value that indicates the Base Class Code
for the GMCH/MCH. This code has the value 06h, indicating a Bridge device.
3.7.8 HDR – Header Type Register (Device #0)
Address Offset: 0Eh
Default Value: 80h
Access: Read Only
Size: 8 bits
This register identifies the header layout of the configuration space. No physical register exists at
this location.
Bit Description
7:0 PCI Header (HDR): This field always returns 80 to indicate that Device #0 is a multifunction
device. If Functions other than 0 are disabled, this field returns a 00 to indicate that the
GMCH/MCH is a single function device with standard header layout. Writes to this location have
no effect.