Datasheet
R
Datasheet 5
3.8.1
VID – Vendor Identification Register (Device #0, Function #1)..........105
3.8.2
DID – Device Identification Register (Device #0, Function #1) .......... 105
3.8.3
PCICMD – PCI Command Register (Device #0, Function #1)...........106
3.8.4
PCISTS – PCI Status Register (Device #0, Function #1)...................107
3.8.5
RID – Revision Identification Register (Device #0, Function #1) .......108
3.8.6
SUBC – Sub-Class Code Register (Device #0, Function #1) ............108
3.8.7
BCC – Base Class Code Register (Device #0, Function #1) .............108
3.8.8
HDR – Header Type Register (Device #0, Function #1) ....................109
3.8.9
SVID – Subsystem Vendor Identification Register (Device #0, Function
#1).......................................................................................................109
3.8.10
SID – Subsystem Identification Register (Device #0, Function #1)....109
3.8.11
CAPPTR – Capabilities Pointer Register (Device #0, Function #1)...110
3.8.12
DRB – DRAM Row (0:3) Boundary Register (Device #0,
Function #1)........................................................................................110
3.8.13
DRA – DRAM Row Attribute Register (Device #0, Function #1)........111
3.8.14
DRT – DRAM Timing Register (Device #0, Function #1)...................112
3.8.15
PWRMG – DRAM Controller Power Management Control Register
(Device #0, Function #1).....................................................................116
3.8.16
DRC – DRAM Controller Mode Register (Device #0, Function #1)....118
3.8.17
DTC – DRAM Throttling Control Register (Device #0, Function #1).. 122
3.9
Configuration Process Registers (Device #0, Function #3)...............................126
3.9.1
VID – Vendor Identification Register (Device #0)...............................127
3.9.2
DID – Device Identification Register (Device #0) ............................... 127
3.9.3
PCICMD – PCI Command Register (Device #0)................................128
3.9.4
PCISTS – PCI Status Register (Device #0)........................................ 129
3.9.5
RID – Revision Identification Register (Device #0) ............................130
3.9.6
SUBC – Sub-Class Code Register (Device #0) .................................130
3.9.7
BCC – Base Class Code Register (Device #0) ..................................130
3.9.8
HDR – Header Type Register (Device #0) .........................................131
3.9.9
SVID – Subsystem Vendor Identification Register (Device #0)..........131
3.9.10
ID – Subsystem Identification Register (Device #0) ...........................131
3.9.11
CAPPTR – Capabilities Pointer Register (Device #0)........................ 132
3.9.12
STRAP – Strap Status (Device #0).....................................................132
3.9.13
HPLLCC – HPLL Clock Control Register (Device #0)........................ 133
3.10
PCI to AGP Configuration Registers (Device #1, Function #0) .........................134
3.10.1
VID1 - Vendor Identification (Device #1) ............................................135
3.10.2
DID1 - Device Identification (Device #1)............................................. 135
3.10.3
PCICMD1 - PCI Command Register (Device #1)............................... 136
3.10.4
PCISTS1 - PCI Status Register (Device #1) ......................................137
3.10.5
RID - Revision Identification (Device #1)............................................137
3.10.6
SUBC1 - Sub-Class Code (Device #1)...............................................138
3.10.7
BCC1 - Base Class Code (Device #1)................................................138
3.10.8
HDR1 - Header Type (Device #1) ......................................................138
3.10.9
PBUSN1 - Primary Bus Number (Device #1) .....................................139
3.10.10
SBUSN1 - Secondary Bus Number (Device #1) ................................ 139
3.10.11
SUBUSN1 - Subordinate Bus Number (Device #1) ...........................140
3.10.12
SMLT1 - Secondary Bus Master Latency Timer (Device #1).............140
3.10.13
IOBASE1 - I/O Base Address Register (Device #1)...........................141
3.10.14
IOLIMIT1 - I/O Limit Address Register (Device #1)............................141
3.10.15
SSTS1 - Secondary Status Register (Device #1)...............................142
3.10.16
MBASE1 - Memory Base Address Register (Device #1) ................... 143
3.10.17
MLIMIT1 - Memory Limit Address Register (Device #1) ....................144
3.10.18
PMBASE1 - Prefetchable Memory Base Address Reg (Device #1) ..145