Datasheet

Signal Description
R
32 Datasheet
Signal Name Type Description
SDQS[8:0] I/O
SSTL_2
Data Strobes: Data strobes are used for capturing data. During writes,
SDQS is centered on data. During reads, SDQS is edge aligned with
data. The following list matches the data strobe with the data bytes.
There is an associated data strobe (DQS) for each data signal (DQ) and
check bit (CB) group.
SDQS[7] -> SDQ[63:56]
SDQS[6] -> SDQ[55:48]
SDQS[5] -> SDQ[47:40]
SDQS[4] -> SDQ[39:32]
SDQS[3] -> SDQ[31:24]
SDQS[2] -> SDQ[23:16]
SDQS[1] -> SDQ[15:8]
SDQS[0] -> SDQ[7:0]
NOTE: Intel 852GME/852PM: ECC error detection is not supported by the
SDQ[71:64] signals if AGP interface is enabled
SCKE[3:0] O
SSTL_2
Clock Enable: These pins are used to signal a self-refresh or power
down command to the DDR SDRAM array when entering system
suspend. SCKE is also used to dynamically power down inactive DDR
SDRAM rows. There is one SCKE per DDR SDRAM row. These signals
can be toggled on every rising SCK edge.
SMAB[5,4,2,1] O
SSTL_2
Memory Address Copies: These signals are identical to SMA[5,4,2,1]
and are used to reduce loading for selective CPC(clock-per-command).
These copies are not inverted.
SDM[8:0] O
SSTL_2
Data Mask: When activated during writes, the corresponding data groups
in the DDR SDRAM are masked. There is one SDM for every eight data
lines. SDM can be sampled on both edges of the data strobes.
NOTE: Intel 852GME/852PM: ECC error detection is not supported by the
SDQ[71:64] signals if AGP interface is enabled
RCVENOUT# O
SSTL_2
Reserved: No connect.
RCVENIN# O
SSTL_2
Reserved: No connect.