Datasheet

Testability
R
240 Datasheet
Table 59. State of Power Planes in C/S States
Power C0-C2
C3
GV1/C4
S1 S3 S4/S4+
SDRAM I/O On On On On Off
HUB I/O On On On Off Off
DVO I/O On On On Off Off
FSB I/O On On On Off Off
CORE On On On Off Off
LVDS I/O On On Off Off Off
GPIO On On On Off Off
For further details, refer to the Mobile Intel
®
Pentium
®
4 Processor Datasheet, Mobile Intel
®
Pentium
®
4 Processor supporting Hyper-Threading Technology on 90-nm process technology
Datasheet, Intel
®
Celeron
®
Processor Datasheet and the Intel
®
Celeron
®
D Processor on 90 nm
process and in the 478-pin package Datasheet.
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