Datasheet

Functional Description
R
Datasheet 181
Figure 9. Intel
®
852GME GMCH Graphics Block Diagram
A
_gmch_bl
k
Instr./
Data
Setup/Transform
3D Engine
Scan Conversion
Texture Engine
Raster Engine
2D Engine
Video Engine
(
MPEG2 Decode
)
Overlay
Sprite
Cursor
Primary
Display
Secondary
Display
Display C
2
n
d
Overlay
A
lpha
Blend/
Gamma/
CRC
Cursor
Cntl
Mux
Port
DAC
LVDS
DVOB
DVOC
DDC
Memory Control
DDR/SDRAM
A
GP2.0
High bandwidth access to data is provided through the system memory port. The GMCH accesses
UMA memory located in system memory at 1.06 GB/s. The GMCH uses a tiling architecture to
minimize page miss latencies and thus maximize effective rendering bandwidth.
5.4.1 Intel
®
GMCH 3D/2D Instruction Processing
The GMCH contains an extensive set of instructions that control various functions including 3D
rendering, BLT operations, display, MPEG decode acceleration, and overlay. The 3D instructions
set 3D pipeline states and control the processing functions. The 2D instructions provide an
efficient method for invoking BLT operations.
5.4.2 3D Engine
The 3D engine of the GMCH has been designed with a deeply pipelined architecture, where
performance is maximized by allowing each stage of the pipeline to simultaneously operate on
different primitives or portions of the same primitive. The GMCH supports the following:
• Perspective-correct texture mapping
• Multitextures
• Embossed and Dot-Product Bump mapping
• Cubic Environment Maps
• Bilinear, Trilinear, and Anisotropic MIP mapped filtering