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Overview

Datasheet 17

1 Overview

This datasheet provides Intel’s specifications for the Intel

852PM and Intel

852GME chipset

based systems.

The Intel

852PM chipset MCH is designed for use with the Mobile Intel

Pentium

4 processor,

Mobile Intel

Pentium

4 Processor supporting Hyper-Threading Technology on 90-nm process

technology, Intel

Celeron

processor or the Intel

Celeron

D processor on 90 nm process and

in the 478-pin package. The Intel MCH manages the flow of information between its five

interfaces: the system bus interface, the system memory interface, the AGP interface, and the hub

interface.

The Intel

852GME chipset GMCH is designed for use with the Mobile Intel Pentium 4

processor, Mobile Intel Pentium 4 processor supporting Hyper-Threading Technology on 90-nm

process technology, Intel Celeron processor or the Intel

Celeron

D processor on 90 nm process

and in the 478-pin package. The GMCH manages the flow of information between its seven

interfaces: the system bus interface, the system memory interface, the analog VGA port, the

DVOB and C interfaces, the hub interface, and the LVDS panel interface.

All recommendations will apply to all platforms unless specified. Any references to GMCH apply

to both platforms unless otherwise specified. Any references to Mobile Intel Pentium 4 processor

also applies to Mobile Intel Pentium 4 processor supporting Hyper-Threading Technology on 90-

nm process technology unless specified. Any references to the Intel Celeron processor also apply

to the Intel Celeron D processor on 90 nm process and in the 478-pin package unless specified.

1.1 Terminology

Term Description

AGTL+ Advanced Gunning Transceiver Logic + (AGTL+) bus

DDC Display Data Channel (standard created by VESA)

DPMS Display Power Management Signaling (standard created by VESA)

I2C Inter-IC (a two wire serial bus created by Philips)

CRT Cathode Ray Tube

LCD Liquid Crystal Display

BLI Backlight Inverter

Core The internal base logic in the Intel

852GME/852PM GMCH

CPU Central Processing Unit

DBI Dynamic Bus inversion