Datasheet

System Address Map
R
166 Datasheet
4.4 Main System Memory Address Range (0010_0000h
to Top of Main Memory)
The address range from 1-MB to the top of main system memory is mapped to main DDR
SDRAM address range controlled by the GMCH/MCH. The GMCH/MCH will forward all
accesses to addresses within this range to the DDR SDRAM unless a hole in this range is created
using the fixed hole as controlled by the FDHC register. Accesses within this hole are forwarded
to hub interface.
The GMCH/MCH provides a maximum DDR SDRAM address decode space of 4 -GB. The
GMCH/MCH does not re-map APIC memory space. The GMCH/MCH does not limit DDR
SDRAM address space in hardware.
4.4.1 15 MB – 16 MB Window
A hole can be created at 15 MB-16 MB as controlled by the fixed hole enable (FDHC register) in
Device 0 space. Accesses within this hole are forwarded to the hub interface. The range of
physical DDR SDRAM disabled by opening the hole is not re-mapped to the top of the memory –
that physical DDR SDRAM space is not accessible. This 15 MB-16 MB hole is an optionally
enabled ISA hole. Video accelerators originally used this hole. Validation and customer SV teams
also use it for some of their test cards and that is why it is being supported. There is no inherent
BIOS request for the 15 MB-16 MB hole.
4.4.2 Pre-allocated System Memory
Voids of physical addresses that are not accessible as general system memory and reside within
system memory address range (< TOM) are created for SMM-mode and legacy VGA graphics
compatibility. It is the responsibility of the BIOS to properly initialize these regions. The
number of UMA options has been extended. Allocation is at a fixed address in terms of rigid
positioning of UMA system memory ÆTOM-TSEG-UMA (size), but it is mapped at any
available address by a PCI allocation algorithm. GMADR and MMADR are requested through
BARs.
The following table details the location and attributes of the regions. Enabling/Disabling these
ranges are described in the Control Register Device #0: GCC.
Table 38. Pre-allocated System Memory
System Memory Segments Attributes Comments
00000000H - 03E7FFFFH R/W Available system memory 62.5 -MB
03E80000H - 03F7FFFFH R/W Pre-allocated Graphics VGA
memory
1 MB (or 4/8/16/32- MB) when IGD
is enabled
03F80000H - 03FFFFFFH SMM Mode Only - CPU Reads TSEG Address Range
03F80000H - 03FFFFFFH SMM Mode Only - CPU Reads TSEG Pre-allocated system memory