Datasheet

System Address Map
R
Datasheet 161
4 System Address Map
A system based on the GMCH/MCH supports 4 GB of addressable system memory space and
64 kB+3 B of addressable I/O space. The I/O and system memory spaces are divided by system
configuration software into regions. The system memory ranges are useful either as system
memory or as specialized system memory, while the I/O regions are used solely to control the
operation of devices in the system.
When the GMCH/MCH receives a Write request whose address targets an invalid space, the data
is ignored. For Reads, the GMCH/MCH responds by returning all zeros on the requesting
interface.
There is a programmable memory address space under the 1-MB region which is divided into
regions which can be individually controlled with programmable attributes such as Disable,
Read/Write, Write Only, or Read Only. Attribute programming is described in the Register
Description section. This section focuses on how the memory space is partitioned and how the
separate memory regions are used. I/O address space has simpler mapping and is explained at the
end of this section.
The GMCH/MCH claims any CPU access over 4 GB and terminates the transaction without
forwarding it to hub interface or AGP (Intel
852GME GMCH and Intel 852PM MCH only).
Simply dropping the data terminates writes and for reads the GMCH/MCH return all zeros on the
host bus.
In the following sections, it is assumed that all of the compatibility memory ranges reside on the
hub interface/PCI. The exception to this rule is VGA ranges, which may be mapped to AGP or to
the internal graphics device (IGD). In the absence of more specific references, cycle descriptions
referencing PCI should be interpreted as the hub interface/PCI, while cycle descriptions
referencing AGP or IGD are related to the AGP bus or the internal graphics device respectively.
The GMCH/MCH Memory Map includes a number of programmable ranges. All of these ranges
must be unique and non-overlapping. There are no Hardware Interlocks to prevent problems in
the case of overlapping ranges. Accesses to overlapped ranges may produce indeterminate results.
4.1 System Memory Address Ranges
The Intel 852GME GMCH and Intel 852PM MCH provide a maximum system memory of 2 GB.
The GMCH/MCH does not re-map APIC memory space and does not limit DDR SDRAM space
in hardware.
It is the BIOS or system designer’s responsibility to limit system memory population so that
adequate PCI, AGP, High BIOS and APIC memory space can be allocated.
The figures below depict the system memory address map in a simplified form and provide details
on mapping specific system memory regions as defined and supported by the GMCH/MCH.