Datasheet

Register Description
R
Datasheet 93
4.9.13 DRA – DRAM Row Attribute Register (Device #0)
Address Offset: 50-51h
Default Value: 77h Each
Access: Read/Write
Size: 8 bits
The DDR SDRAM Row Attribute Register defines the page sizes to be used when accessing
different pairs of Rows. Each Nibble of information in the DRA registers describes the page size
of a pair of Rows:
Row0, 1: 50h
Row2, 3: 51h
52h-5Fh: Reserved.
7 6 4 3 2 0
R Row attribute for Row1 R Row Attribute for Row0
7 6 4 3 2 0
R Row attribute for Row3 R Row Attribute for Row2
Bit Description
7 Reserved
6:4 Row Attribute for odd-numbered Row: This field defines the page size of the corresponding row.
000: Reserved
001: 4 kB
010: 8 kB
011: 16 kB
111: Not Populated
Others: Reserved
3 Reserved
2:0 Row Attribute for even-numbered Row: This field defines the page size of the corresponding row.
000: Reserved
001: 4 kB
010: 8 kB
011: 16 kB
111: Not Populated
Others: Reserved