Datasheet

R
Datasheet 3
Contents
1
Introduction .......................................................................................................................19
1.1 Terminology..........................................................................................................19
1.2 Reference Documents.......................................................................................... 21
2 Intel
®
855GM/855GME Chipset GMCH Overview ............................................................ 23
2.1 System Architecture .............................................................................................23
2.1.1 Intel
®
855GM Chipset GMCH ...............................................................23
2.1.2 Intel
®
855GME Chipset GMCH.............................................................23
2.2 Processor Host Interface...................................................................................... 24
2.3 GMCH System Memory Interface ........................................................................24
2.4 Graphics Features................................................................................................25
2.5 Display Features ..................................................................................................26
2.5.1 GMCH Analog Display Port ..................................................................26
2.5.2 GMCH Integrated LVDS Port................................................................26
2.5.3 GMCH Integrated DVO Ports ............................................................... 26
2.6 Intel
®
855GME GMCH AGP Interface..................................................................26
2.7 Hub Interface........................................................................................................27
2.8 Address Decode Policies .....................................................................................27
2.9 GMCH Clocking....................................................................................................27
2.10 System Interrupts .................................................................................................28
3 Signal Descriptions ........................................................................................................... 29
3.1 Host Interface Signals ..........................................................................................30
3.2 DDR SDRAM Interface.........................................................................................32
3.3 AGP Interface Signals .......................................................................................... 34
3.3.1 AGP Addressing Signals ...................................................................... 34
3.3.2 AGP Flow Control Signals ....................................................................35
3.3.3 AGP Status Signals .............................................................................. 35
3.3.4 AGP Strobes.........................................................................................36
3.3.5 AGP/PCI Signals-Semantics ................................................................36
3.4 Hub Interface Signals...........................................................................................39
3.5 Clocks...................................................................................................................39
3.6 Internal Graphics Display Signals ........................................................................41
3.6.1 Dedicated LVDS LCD Flat Panel Interface...........................................41
3.6.2 Digital Video Output B (DVOB) Port .....................................................42
3.6.3 Intel
®
855GME GMCH DVO/I
2
C to AGP Pin Mapping .........................42
3.6.4 Digital Video Output C (DVOC) Port..................................................... 44
3.6.5 Analog CRT Display .............................................................................45
3.6.6 General Purpose Input/Output Signals.................................................46
3.7 Voltage References, PLL Power .......................................................................... 48
4 Register Description..........................................................................................................51