Datasheet

R
Datasheet 17
Intel
®
855GME Chipset GMCH
Features
Note: The Intel 855GME chipset GMCH has identical features to the Intel 855GM chipset GMCH
except for the additional features listed below.

Processor/Host Bus Support
⎯ Pin and spec compatible with the Intel
®
Pentium
®
M processor, Intel
®
Pentium
®
M
Processor on 90 nm process with 2-MB L2
Cache and Intel
®
Celeron
®
M processor

Memory System
⎯ Support for 333 MHz DDR SDRAM
devices with max of two double-sided SO-
DIMMs (4 rows populated) with unbuffered
PC2700 DDR SDRAM.

Display
⎯ Dedicated LFP (local flat panel) interface
• Supports data format up to 24-bpp
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Internal Graphics Features
⎯ Core Vcc = 1.2 V or 1.35 V (1.35 V needed
to support Graphics core frequency of 250
MHz and 333 MHz DDR SDRAM devices)
⎯ Graphics core frequency
• Display core frequency at 133 MHz,200
MHz, 250 MHz
• Render core frequency at 100 MHz,
133 MHz, 166 MHz, 200 MHz, 250
MHz
• Intel® Dual-Frequency Graphics
Technology
⎯ 3D Graphics Engine
• Enhanced Hardware Binning Instruction
Set supported
• Bi-Cubic Filtering supported
• Linear Gamma Blending for Video
Mixer Rendering (VMR)
• Video Mixer Rendering (VMR)
supported
⎯ Graphics Power Management
• Dynamic Frequency Switching
• Memory Self-Refresh During C3

Intel® Display Power Saving Technology

Power Management
⎯ Optimized Clock Gating for 3D and Display
Engines
⎯ On-Die Thermal Sensor
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Accelerated Graphics Port (AGP) Interface
⎯ Supports a single AGP device
⎯ Supports AGP 2.0 including 1X,2X, and 4X
AGP data transfers and 2X/4X Fast Write
protocol
⎯ Supports only 1.5 V AGP electricals
⎯ 32 deep AGP request queue
⎯ PCI semantic (Frame# initiated) accesses to
DDR SDRAM are snooped
⎯ AGP semantic (PIPE# and SBA) accesses to
DDR SDRAM are not snooped
⎯ Hierarchical PCI configuration mechanism
⎯ Delayed transaction support
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AGP Busy/Stop Protocol