Datasheet
R
10 Datasheet
Table 26. PAM Registers and Associated System Memory Segments............................71
Table 27. Host-Hub I/F Bridge/System Memory Controller Configuration Space (Device
#0, Function#1)..........................................................................................................86
Table 28. Configuration Process Configuration Space (Device#0, Function #3) ........... 105
Table 29. Intel
®
855GM GMCH Configurations and Some Resolution Examples..........111
Table 30. For Intel
®
855GME GMCH Configurations and Some Resolution Examples.112
Table 31. Integrated Graphics Device Configuration Space (Device #2, Function#0)...113
Table 32. System Memory Segments and Their Attributes ............................................ 126
Table 33. Pre-allocated System Memory........................................................................128
Table 34. SMM Space Transaction Handling .................................................................131
Table 35. Relation of DBI Bits to Data Bits .....................................................................137
Table 36. Data Bytes on SO-DIMM Used for Programming DRAM Registers...............139
Table 37. Dual Display Usage Model (Intel
®
852GM GMCH) ........................................150
Table 38. Panel Power Sequencing Timing Parameters................................................157
Table 39. AGP Commands Supported by the GMCH when Acting as an AGP Target .158
Table 40. Fast Write Initialization.................................................................................... 160
Table 41. PCI Commands Supported by the GMCH When Acting as a FRAME#
Target....................................................................................................................... 161
Table 42. Enhanced Intel SpeedStep
®
Technology Overview .......................................167
Table 43. Absolute Maximum Ratings ............................................................................169
Table 44. Intel
®
855GM/855GME GMCH Package Thermal Resistance.......................170
Table 45. Power Characteristics.....................................................................................171
Table 46. Table Signals ..................................................................................................173
Table 47. DC Characteristics..........................................................................................176
Table 48. DAC DC Characteristics: Functional Operating Range
(VCCDAC = 1.5 V ±5%)........................................................................................... 183
Table 49. DAC Reference and Output Specifications ....................................................184
Table 50. Differential Signals in the XOR Chains...........................................................187
Table 51. XOR Chain Exclusion List of Pins...................................................................187
Table 52. XOR Mapping .................................................................................................188
Table 53. Voltage Levels and Ball Out for Voltage Groups ............................................200
Table 54. Strapping Signals and Configuration .............................................................. 201
Table 55. Ballout Table ...................................................................................................204