Guide

Intel Celeron M Processor Front Side Bus Design Guidelines
R
72 Intel
®
852GM Chipset Platform Design Guide
Currently 1% tolerance resistors are recommended for Rs and Rtt. The use of 5% tolerant resistors for
these resistors and whether it could provide adequate signal quality performance is under investigation.
Figure 32. Processor RESET# Signal Routing Topology with ITP700FLEX Connector
CPU
L2
L3
Rs
L1
ITPFLEX
CONNECTOR
GMCH
Rtt
VCCP
RESET#
CPURESET#
RESET#
Table 28. Processor RESET# Signal Routing Guidelines with ITP700FLEX Connector
L1 L2 + L3 L3 Rs Rtt
1.0” – 6.0” 6.0” max 0.5” max Rs = 22.6 Ω ± 1% Rtt = 220 Ω ± 5%
5.6.1. Processor RESET# Routing Example
Figure 33 illustrates a board routing example for the RESET# signal with an ITP700FLEX debug port
implemented. It illustrates how the CPURST# pin of GMCH forks out into two branches on Layer 6 of
the motherboard. One branch is routed directly to the processor RESET# pin amongst the rest of the
common clock signals. Another branch routes below the address signals and vias down to the secondary
side that route to the Rs and Rtt resistors. These resistors are placed in the vicinity of the ITP700FLEX
debug port.
Note: The placement of Rs and Rtt next to each other is to minimize the routing between Rs and Rtt as well as
the minimal routing between Rs and the ITP700FLEX connector. Also, since a transition between Layer
6 and the secondary side occurs, a GND stitching via is added to guarantee continuous ground reference
of the secondary side routing of the RESET# signal to ITP700FLEX connector.