Guide

A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
1
4
VR Interposer Headers
0
Connector 2
(rows C,D)
Connector 1
(rows A,B)
2
3
1.200 V
1
1
0
0
2
0
1
1
1
0
4
0.900 V
0
1
1
+VCC_CORE
0.625 V0
0
0
JUMPER SETTINGS
0
0
1
0
0
0
0
1
0
1
1.250 V
0
1
0
0
0
0
1
1
0
1.050 V
1
0.700 V
0
1.150 V
0
0.875 V
1
1.650 V
0
1
1
1
1
1
0
0.850 V
1 0.975 V
0
1
0.950 V
1
0.750 V
1
0
1
0
1
DIP Switch Settings
0.825 V
1
1
0
0
1
0
1
1
1.300 V
1
1
0
0
1
0
0
1
1
1
0
0.650 V
0
0.775 V
0
1
3
1
1
2
1
0
0
1
1
1.700 V
1
1
1
0
0
0
0
0
0
0.925 V
0
1
0
1
0
0
0.800 V
1
0
1
0
1
1
0
0
Mobile Northwood VID table
1
0
4
DIP Switch Settings
1.400 V
0
1.100 V
1.350 V
0
+VCC_CORE
1
1
0
1
0
1
0
0
1
0
0
1
1
1
0
1.450 V
0
1
1
0
0
0.600 V
1
0
0
1.500 V
0
0.675 V
1.600 V
1.550 V
0
3
1
0
1
1
1
1
1
1
0
1
0
1.750 V
0.725 V
1
1
0
0
1
0
1
0
0
1.000 V
1
1
0
1
0
1
1
1
0
For EVMC use, J1F1 is to be jumpered and J1G1,
J1G2, J1G3, J1G4, J1H1 need to be jumpered 1-2
Step 1 - Power OK
Note: J1F1 enables
Manual VID strapping
With pin 13 high, B input goes to C
output. With pin 13 low, A input goes
to C output.
Step 2 - VR ON
Step 3 - Power Good
VR PWRGD CIRCUIT
Layout note:
Route +VCC_VID
to processor with at
least a 25 mil trace.
J1H7
1-2 (Default)
2-3
1-X
VID5 Setting
Processor Control
Logic "0"
Logic "1"
A#
Processor VR Interposer Support & Power Circuitry
A
39 59
Intel 852GM CRB
Title
Size Document Number Rev
of
Project:
MAIN2_PWROK
STRAP1
H_VID1
VID2_LED
BE#
VR_VID5
H_VID0
STRAP4
H_VID4
VID4_LED
H_VID3
STRAP2
H_VID2
STRAP3
INTERPOSER_PRES#
TP_OFF_BOARD_VCC_VID_PWRGD
STRAP0
VID3_LED VID1_LED
BX
BX_PU
STRAP_VID4
OFF_BOARD_VR_ON
STRAP_VID3
STRAP_VID1
STRAP_VID0
STRAP_VID2
INTERPOSER_PRES#
IMVP_PWRGD_D
INTERPOSER_PRES
OFF_BOARD_VR_PWRGD
PWRGD2
PWRGD1
OFF_BOARD_VR_ON
MAIN_PWROK
OFF_BOARD_VR_PWRGD
VR_VID2
VR_VID0
VR_VID1
VID0_LEDVID5_LED
VR_VID4
VR_VID3
VR_VID5
INTERPOSER_PRES#
SMB_CLK_VR
SMB_DATA_VR
PM_STPCPU# 6,19,37,40
VR_VID3 34,40
VR_VID4 34,40
ON_BOARD_VR_ON 40
DDR_VR_PWRGD43
+V3.3S5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V3.3ALWAYS5,15,19..23,27..29,32,36..38,44,48
VR_VID0 34,40
VR_SHUT_DOWN#32
+VCC_VID4,40
VR_ON32,37,42
VR_VID1 34,40
VR_VID2 34,40
H_VID[4:0]4
PM_PWROK 19,21,25,32,37
PWR_PWROK44
+V3.3S5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
PM_DPRSLPVR 19,37,40
+V5S 8,15..18,20,23..25,27,3
V1.5_PWRGD20
+V3.3S5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V3.3S5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V5S8,15..18,20,23..25,27,34,35,38,40,42,44,47
STRAP_VID447
STRAP_VID347
STRAP_VID247
STRAP_VID147
STRAP_VID047
ON_BOARD_VR_PWRGD40
IMVP_PWRGD 7,40
+V3.315,18..20,23,27,30,32,35,37,38,43,44
VR_PWRGD 37
+V3.3ALWAYS5,15,19..23,27..29,32,36..38,44,48
GMCH_VCORE_PWRGD42
+V3.3ALWAYS5,15,19..23,27..29,32,36..38,44,48
VR_PWRGD_CK408# 6
+V3.3S 5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V5S8,20,23..25,27,34,35,38,40,42,44,47
+V3.3ALWAYS5,15,19..23,27..29,32,36..38,44,48
V5A_PWRGD21
+V3.3S 5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V5S 8,15..18,20,23..25,27,34,35,38,40,42,44,47
+V3.3S23,26,31,33..36,38,40,42,44,48
H_PROCHOT#3
H_VIDPWRGD3
H_VID53
+V3.3S5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+VDC16,21,40,44
+VDC16,21,40,44
SMB_DATA_S6,8,11,12,16,18
SMB_CLK_S 6,8,11,12,16,18
U4B3C
74HC00
10
9
8
7
14
RP1E1D
1K
45
R1E3
1K
U7A6
74AHC1G08
1
2
4
53
R1Y3
330
RP1E1B
27
C7A4
0.1UF
R2G9
10K
R1H3
8.2K
CON3_HDR
J1G4
3
2
1
C7A2
0.1UF
R3G10
10K
CON3_HDR
J1H7
3
2
1
R2Y2
330
R2Y3
330
R1Y2
330
U7A5
74AHC1G08
1
2
4
53
R1H6
1K
U4B4
74AHC1G08
1
2
4
53
CON3_HDR
J1H1
3
2
1
C7B1
0.1UF
DS2J5
GREEN
1 2
DS1J1
GREEN
1 2
DS1J3
GREEN
1 2
R1Y1
330
J5C2
20x2_Header
21
4
6
3
8
10
5
12
14
7
16
9
11
13
15
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R1F1
1K
RP1G1C
8.2K
36
U4B5
74AHC1G08
1
2
4
53
R1F6
8.2K
C4B2
0.1UF
C4B4
0.1UF
U4B3B
74HC00
4
5
6
7
14
RP1E1C
36
C7B2
0.1UF
DS2J4
GREEN
1 2
RP1E1A
18
DS1J2
GREEN
1 2
Q2G1
2N3904
1
3
2
J5C3
20x2_Header
21
4
6
3
8
10
5
12
14
7
16
9
11
13
15
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
DS2J3
GREEN
1 2
R4N1
100K
U4B3D
74HC00
13
12
11
7
14
J1F1
12
RP1G1D
8.2K
45
R4N2
2.2k
U7A3
74AHC1G08
1
2
4
53
R1F3
1K
C4B5
0.1UF
R5B3
NO_STUFF_0
CON3_HDR
J1G2
3
2
1
CON3_HDR
J1G1
3
2
1
U1F1
Bus_Switch_74CBT3383
3
7
11
17
21
4
8
14
18
22
1
13
2
6
10
16
20
5
9
15
19
23
24
12
A0
A1
A2
A3
A4
B0
B1
B2
B3
B4
BE#
BX
C0
C1
C2
C3
C4
D0
D1
D2
D3
D4
VCC
GND
R5B4
NO_STUFF_0
U4B3A
74HC00
1
2
3
7
14
U7B1
74AHC1G08
1
2
4
53
C1F2
0.01UF
R2Y1
330
CON3_HDR
J1G3
3
2
1
R1G1
8.2K
RP1G1B
8.2K
27