Guide

A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
J9A1
1-2
J1G1
VID3 Strap
Moon ISA Support
HIGH ON
1010 001x
HIGH
39
SO-DIMM0
J1H1
RI# (Ring Indicate) from serial port
PME# (Power Management Event) from PCI/mini-PCI slots,
ADD slot, LPC slot
Jordan I/O from Kinnereth+
LID switch attached to SMC
USB
AC97 wake on ring
SmLink for AOL II
Hot Key from the scan matrix keyboard
1-X
3
J8A1
38
IDSEL #
SMC/KBC Num Lock
J1G3
SMB_ICH_S
0101 0111
+V*
0101 1001
38
34
ON
SIGNAL
I C / SMB Addresses
2-3
08
1-2
J1F1
1-2
(E, F, G, H optional)
DS1H2
2-3
(E internal)
GMCH Strap: Clock Config
KBC 60/64 Decode Disable
J6E1
Net Naming Conventions
Voltage Rails
57
CRB/SV Detect
1-2 LVDS EV
+V*ALWAYS
LOW
44
SMB_ICH_S
1-2
55
Bus
SLP_S1#
OFF
SMC/KBC Scroll Lock
Page
2-3
08
1
38
08
ON
Bluetooth Header
39
19
2-3
Active Low signal
J8J2
Intel 852GM CUSTOMER REFERENCE PLATFORM
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
J7B1
=
1-X
9C
SMB_ICH
VID1 Strap
2
HIGH
Docking
SMB_SB
Reference
56
A2
LOW
1
VID4 Strap
Default
1-2
Power On/Off
SMB_ICH_S
OFF
SMB_ICH
Device
LOW
1
SMB_SB
SMB_THRM
SMB_SB
OFF
SMB_ICH
LOW
1-X
Suffix
ON
H
DV4
Prefix
J7B3
S3 (Suspend to RAM)
SLP_S4#
____ ____
59
Virtual Battery On/Off
Host
39
23
S5 / Soft OFF
32
M
#
LOW
ON
1101 001x
3
1-X
2
A
1-X
53
SOT-23
SMB_ICH
Smart Battery
Full ON
I1-I4
HIGH
DS1H1
____ ____
0101 0110
0001 001x
0101 0010 39
1-2
+V*S
REQ/GNT #
1-2
2
LOWHIGH
DS8A2
SMB_THRM
ON
PC/PCI
Reference
SMB_ICH
1-2
Page
C, D, B, A
32SMC/KBC Disable
S1M (Power On Suspend)
Manual VID Strap Enable
23
2
STATE
LOW
51
(AD24 internal)
HIGH
PCB Footprints
J1G2
1-2
32
1-X
J9G2
Description
DS2J2
2-3
GMCH Strap: Clock Config
1-2
J8A2
S4 State
1-2
J7B6
Switch
HIGH
1-X
D2
OFF
=
2-3
Slot 1
0001 011x
33INIT Clock Disable
S1 State
__
Power States
1-2
Primary IDE
08
SW8A1
=
SO-DIMM1
Smart Selector
J7B4
Moon ISA Support
38
DS2J1
OFF
VID0 Strap
Hex
PV0-PV3
AD16
38
1-2
32
LED
GMCH Strap: DVO Strap
1-2
1-2
Secondary IDE
V1-V4
39
Slot 3
3
SMC/KBC Programming
J9E2
DS8A1
DV0-DV3
AD17
Thermal Diode
16
2-3
SW8J1
1
VID1
32
ON
SMB_ICH__
39
AD18
__
G, F, E, H
ON
LOW
J1G4
Jumper
LEDs and Switches
DS2H2
1001 110x
DS1J1
2-3
SLP_S5#
ON
27
SW7J1
39
Moon ISA Support
LOW
1010 000x
+VDC
+VCC_IMVP
+VCC_VID
+V1.2S
+V1.25S
+V1.5S
+V1.5ALWAYS
+V1.5
+V2.5
+V3.3ALWAYS
+V3.3
+V3.3S
+V5ALWAYS
+V5
+V5S
+V12S
-V12S
Address
27
39
J9B1 1-X
1-2
DS1J3
EP1-EP4
Smart Battery Charger
HIGH
1-2
43
VID3
VID2
VID4
32
SMB_ICH
ON
1-X
Device
VID2 Strap
32
LOW
19
SMB_SB
SLP_S3#
VID0
0001 010x
LAN
SOT23-5
1-X
J9E4
V9-V12
SMB_ICH_S
DS2J3
39
39
2-3
B
S3 State
52
1-2 or 2-3
Thermal Sensor Header
SMB_ICH
S0 State
DS1H3
Slot 2
54
DS1J2
EV Support:
LPC Pwr Mngmnt Header
0101 0100
1-2
HIGH
Spread Spectrum Clock
S5 State
DDR Memory
F, G, H, E
D, A, B, C
V5-V8
Default Jumper Settings
4
0101 0001
1-2
ON
HIGH
A0
__
GMCH Strap: Clock Config
J7B5
08
33
0101 0011
4
J9E5SMB_SB
DS2J4
1-2
TP = Test Point (does not
connect anywhere
else)
0101 0100
08
S4 (Suspend To Disk)
32
LPC Pwr Mngmnt Header
As seen from top
5
OFF
44
J9H1
Interrupts
Option
Primary DC system power supply (10 to 21V)
Core/VTT voltage for processor & VTT for Montara-GML
1.2V for processor PLL and VID circuitry
1.2V for Montara-GML core/hub interface
1.25V DDR Termination voltage
1.5V switched power rail (off in S3-S5)
1.5V always on power rail
1.5V power rail (off in S4-S5)
2.5V power rail for DDR
3.3V always on power rail
3.3V power rail (off in S4-S5)
3.3V switched power rail (off in S3-S5)
5.0V for ICH4M’s VCC5REFSUS
5.0V power rail (off in S4-S5)
5.0V switched power rail (off in S3-S5)
12.0V switched power rail (off in S3-S5)
-12.0V switched power rail for PCI (off in S3-S5)
SIO Disable
D4
SW9A1
58
A
4
OFF
Clock Generator
Lid
____ ____
SMC/KBC Caps Lock
3
Port 80-81/82-83 Select1-X
90
SMB_ICH
2-3
LOW
SMB_ICH
J3G1
DS2H1
Dock Connector
____ ____
____ ____
2-3
1-2
23
14
1-2
1101 010x
12
2-3
1001 000x
CMOS Clear
PCI Devices
OFF
1-X
39
PV4 SMB_ICH
GMCH Strap: PSB Voltage
J2J3
0101 0101
AD28
DDR EV Support
A
SMB_ICH
DS8B1
Reset
Page2
LVDS Backlight Inverter
Wake Events
Clocks
__
J3G2
Notes and Annotations
A
259
Intel 852GM CRB A#
Title
Size Document Number Rev
of
Project: