Guide

Platform Design Checklist
R
264 Intel
®
852GM Chipset Platform Design Guide
Figure 147. External Circuitry for the RTC
32.768 kHz
Xtal
0.047uF
10M
Ω
VCCRTC
RTCX2
RTCX1
VBIAS
Vbatt
1uF
1k
Ω
3.3V Sus
10M
Ω
C1 C2
C3
R1
R2
Notes
Reference Designators Arbitrarily Assigned
3.3V Sus is Active Whenever System Plugged In
Vbatt is Voltage Provided By Battery
VBIAS, VCCRTC, RTCX1, and RTCX2 are ICH4-M pins
VBIAS is used to bias the ICH4 Internal Oscillator
VCCRTC powers the RTC well of the ICH4-M
RTCX1 is the Input to the Internal Oscillator
RTCX2 is the feedback for the external crystal
14.8.11. LAN Interface
Pin Name System
Pull-up/Pull-down
Notes
9
LAN_JCLK Connect to LAN_CLK on the platform LAN Connect Device. If LAN
interface is not used, leave the signal unconnected (NC).
LAN_RST#
10 k
Ω pull-down to gnd
If ICH4-M LAN not
used
Timing Requirement: Signal should be connected to power
monitoring logic, and should go high no sooner than 10 ms after
both VccSus3_3 and VccSus1_5 have reached their nominal
voltages.
NOTE: If ICH4-M LAN controller is NOT used, pull LAN_RST# down
through a 10 k
Ω resistor.
LAN_RXD[2:0],
LAN_TXD[2:0]
Connect to LAN_RXD on the platform LAN Connect Device.
If LAN interface is not used, leave the signal unconnected (NC)
LAN_RSTYSNC Connect to LAN_RSTSYNC on Platform LAN Connect Devce.
If LAN interface is not used, leave the signal unconnected (NC).