Guide

Platform Design Checklist
R
Intel
®
852GM Chipset Platform Design Guide 263
Figure 146. Single Generated GMCH & ICH4-M VSWING/VREF Reference Voltage/ Local Voltage
Divider Circuit for VSWING/VREF
HIREF
V
CC
HI=1.5V
Intel
®
ICH4
R4
R5
C1
HI_VSWING
C3
R6
R7
HLVREF
PVSWING
C5 C2
C4
C6
GMCH
R4 = 43.2
Ω
±
1%,
R5 = 49.9 Ω ± 1%,
R6 = 78.7 Ω ± 1%,
R7 = 24.2 Ω ± 1%
C1 and C3 = 0.1 µF
(near divider)
C2, C4, C5, C6 =
0.01µF (near
component)
14.8.10. RTC Circuitry
Pin Name System
Pull-up/Pull-down
In Series Notes
9
RTCRST#
180 k
Ω pull-up to
VccRTC
RTCRST# requires 18-25 ms delay. Use a 0.1 µF cap
to ground Pull up with 180 k
Ω resistor. Any resistor or
capacitor combination that yields a time constant is
acceptable.
CLK_RTCX1,
CLK_RTCX2
Connect a 32.768 kHZ crystal oscillator across these
pins with a 10 M
Ω resistor and a decoupling cap at
each signal. Values for C1 and C2 are dependent on
crystal.
See Figure 147.
CLK_VBIAS
1 K
Ω
0.047 µF
Connect to CLK_RTCX1 through a 10 MΩ resistor.
Connect to VBATT through a 1 k
Ω in series with a
0.047 µF capacitor.