Guide

Platform Design Checklist
R
Intel
®
852GM Chipset Platform Design Guide 257
14.8. ICH4-M Checklist
Note: All inputs to the ICH4-M must not be left floating. Many GPIO signals are fixed inputs that must be
pulled up to different sources.
14.8.1. PCI Interface and Interrupts
Pin Name System Pull-up /Pull-down Notes
9
PCI_DEVSEL#
8.2 k
pull-up to Vcc3_3
PCI_FRAME#
8.2 k
pull-up to Vcc3_3
PCI_GPIO0 / REQA#
PCI_GPIO1 / REQB_L/REQ5#
8.2 k
pull-up to Vcc3_3
Each signal requires a pull-up resistor.
PCI_GPIO16 / GNTA# GNTA is also used as a strap for “top block
swap”. It is sampled on the rising edge of
PWROK. By default, this signal is HIGH
(strap function DISABLED). It can be enabled
by a pull-down to gnd through a 1-k
resistor.
PCI_IRDY#
8.2 K
pull-up to Vcc3_3
PCI_LOCK#
8.2 K
pull-up to Vcc3_3
PCI_PERR#
8.2 K
pull-up to Vcc3_3
PCI_SERR#
8.2 K
pull-up to Vcc3_3
PCI_STOP#
8.2 K
pull-up to Vcc3_3
PCI_TRDY#
8.2 K
pull-up to Vcc3_3
PCI_REQ[4:0]#
8.2 K
pull-up to Vcc3_3
Each signal requires a pull-up resistor.
PCI_PME#
ICH4-M has internal pull-up to VccSus3_3.
PCI_RST#, PAR, GNT[4:0]#,
GNTA#, GNTB#
None
APICCLK
0
to gnd
Can also be connected directly to ground.
APICD[1:0]
10 k
pull-down to gnd
If XOR chain testing is NOT used: Pull down
the signals through a shared 10 k
resistor. If
XOR chain testing is used: Each signal
requires a separate 10 k
pull-down resistor.
INT_IRQ[15:14]
8.2 k
pull-up to Vcc3_3
Each signal requires a pull-up resistor.
INT_PIRQ#[A:D]
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
8.2 k
pull-up to Vcc3_3
Extneral pull up is required for
INT_PIRQ#[A:D]. External pull up is required
when muxed signal (INT_PIRQ[E:H]#/
GPIO[2:5]) is implemented as PIRQ.
INT_SERIRQ
8.2 k
pull-up to Vcc3_3