Guide

Platform Design Checklist
R
256 Intel
®
852GM Chipset Platform Design Guide
Pin Name Configuration F Qty Notes
9
VCCAHPLL Connect to VCC1_2 0.1 µF 1
VCCAGPLL Connect to VCC1_2 0.1 µF 1
VCCADPLLA Connect to VCC1_2
with filter network
0.1 µF
220 µF
1
1
0.1 µH from power supply to GMCH pins,
with caps on GMCH side of inductor.
VCCADPLLB Connect to VCC1_2
with filter network
0.1 µF
220 µF
1
1
0.1 µH from power supply to GMCH pins,
with caps on GMCH side of inductor.
NOTE: Decoupling guidelines are recommendations based on our reference board design. Customers will need to
take layout and PCB board design into consideration when deciding on overall decoupling solution.
14.7.7. GMCH Power-up Sequence
Table 100. Intel 852GM GMCH Power-up Timing Specifications
Timing Parameters Min Max Unit Notes
9
PWROK active to RSTIN# inactive. 1 ms See Figure 144
RSTIN# inactive to CPURST# inactive. 1 ms See Figure 144
Figure 144. Intel 852GM GMCH Power-up Sequence
CPURST#
RSTIN#
1ms min
1ms max
PWROK
GMCH PWR
Rails