Guide

Integrated Graphics Display Port
R
Intel
®
852GM Chipset Platform Design Guide 141
Table 55. DVOC Interface Package Lengths
Signal Pin Number Package Length (mils) P1
DVOCBLANK# L3 541
DVOCCLK J3 601
DVOCCLK# J2 675
DVOCD[0] K5 489
DVOCD[1] K1 692
DVOCD[2] K3 622
DVOCD[3] K2 685
DVOCD[4] J6 536
DVOCD[5] J5 518
DVOCD[6] H2 720
DVOCD[7] H1 771
DVOCD[8] H3 649
DVOCD[9] H4 625
DVOCD[10] H6 521
DVOCD[11] G3 762
DVOCFLDSTL H5 566
DVOCHSYNC K6 491
DVOCVSYNC L5 440
8.3.2.4. DVO Port Termination
The DVO interface does not require external termination.
8.4. DVO GMBUS and DDC Interface Considerations
The GMCH DVOC port controls the video front-end devices via the GMBUS (I2C) interface.
DDCADATA and DDCACLK should be connected to the CRT connector. The GMBUS should be
connected to the DVO device, as required by the specifications for those devices. The protocol and bus
may be used to configure registers in the TV encoder, TMDS transmitter, or any other external DVI
device. The GMCH also has an option to utilize the DDCPCLK and DDCPDATA to collect EDID
(Extended Display Identification) from a digital display panel.
Pull-ups (or pull-ups with the appropriate value derived from simulating the signal) typically ranging
from 2.2 kΩ to 10 kΩ are required on each of these signals.
The following GMCH signal groups list the six possible GMBUS pairs.